Search found 290 matches

by aquasnake
Fri Jan 14, 2022 3:52 am
Forum: NESdev
Topic: Mapper 163 in a Cpld. Question about the Nes signals.
Replies: 13
Views: 594

Re: Mapper 163 in a Cpld. Question about the Nes signals.

I just apply these two different implementation to my hardware CPLD flashcart, which is not convincing. I need someone else's test data on the physical development cart.
by aquasnake
Fri Jan 14, 2022 3:26 am
Forum: NESdev
Topic: Mapper 163 in a Cpld. Question about the Nes signals.
Replies: 13
Views: 594

Re: Mapper 163 in a Cpld. Question about the Nes signals.

Several games with strict PPU scanline timing were tested: Hu Lu Jin Gang(NJ039) San Guo Zhi - CaoCao Zhuan(NJ018) San Guo Zhi - Lv Bu Zhuan(NJ040) San Guo Zhi - Liu Bei Zhuan(NJ083) The method based on PPU address line latch has more graphic glitches, while the other which based on scanline detecti...
by aquasnake
Thu Jan 13, 2022 8:52 pm
Forum: General Stuff
Topic: Name of this game?
Replies: 22
Views: 1201

Re: Name of this game?

wild guess The register initialization routine must be run in time after startup. ASAP! The IO always conflicts at the moment of startup, but there will be no problem for a short while. After that, the current drops down If you dump 32K Prom directly without proper dump script writing to the registe...
by aquasnake
Thu Jan 13, 2022 12:54 am
Forum: NESemdev
Topic: completing iNES mappers
Replies: 7
Views: 270

Re: completing iNES mappers

NewRisingSun wrote: Thu Jan 13, 2022 12:41 am
aquasnake wrote:if you remove the prg rom from a mapper233's board to a mapper226 one, i'm pretty sure it works fine
I did, and no, it does not.
Would you like to post the rom here?

I'm interested in testing.
by aquasnake
Wed Jan 12, 2022 11:00 pm
Forum: NESemdev
Topic: completing iNES mappers
Replies: 7
Views: 270

Re: completing iNES mappers

The reset switch circuit can be combined with any mapper. In a more understandable way, this part of the circuit can be isolated from the mapper, and the hardware can also be made on an adapter board, like the GameGenie Generally, it provides the upper bit of the address lines (e.g. 4 bits if it is ...
by aquasnake
Wed Jan 12, 2022 9:32 pm
Forum: NESemdev
Topic: completing iNES mappers
Replies: 7
Views: 270

Re: completing iNES mappers

if you remove the prg rom from a mapper233's board to a mapper226 one, i'm pretty sure it works fine :D
by aquasnake
Wed Jan 12, 2022 8:50 pm
Forum: NESemdev
Topic: completing iNES mappers
Replies: 7
Views: 270

Re: completing iNES mappers

In China/Russia/Brazil, there are a huge number of reset-based pirate carts, and some people are constantly making them nowadays. The ROM number of those multicarts is not uniform, usually from 4-in-1 to 16-in-1. The switching mode and the counter accumulation principle are different. If you count t...
by aquasnake
Wed Jan 12, 2022 7:27 pm
Forum: NESdev
Topic: Mapper 163 in a Cpld. Question about the Nes signals.
Replies: 13
Views: 594

Re: Mapper 163 in a Cpld. Question about the Nes signals.

By directly latching PPU_A[9], I released about 25 MC/LE/LUT(s)
by aquasnake
Wed Jan 12, 2022 5:08 am
Forum: NES Hardware and Flash Equipment
Topic: Need advice buying a NES-101 and a flash cart
Replies: 39
Views: 1199

Re: Need advice buying a NES-101 and a flash cart

The problem with flash carts in general is that while the console is 100% authentic hardware, a flash cart never is. Like Fiskbit said, the menus will temper with the power on state and the mappers will be, at most, as accurate as the reverse engineering efforts made thus far permit. Flash carts ar...
by aquasnake
Tue Jan 11, 2022 9:06 pm
Forum: NESemdev
Topic: completing iNES mappers
Replies: 7
Views: 270

completing iNES mappers

This is an overview of my ines implementation. A few are not supported. Due to the lack of information, the wiki does not describe them Mapper54 seems to have been reassigned in NES 2.0, but this iNES number is used as a private mapper by some emulators Mapper60, based on reset switching, is just a ...
by aquasnake
Tue Jan 11, 2022 5:08 am
Forum: General Stuff
Topic: Name of this game?
Replies: 22
Views: 1201

Re: Name of this game?

Connect the output pins of the two latches (2bit D flip-flop trigger) and properly scramble the bit order. When the corresponding output levels are the same, it works safely. If not, an IO conflict will be triggered, causing the hardware to burn down I strongly oppose this kind of protection, which ...
by aquasnake
Tue Jan 11, 2022 3:38 am
Forum: NESdev
Topic: Mapper 163 in a Cpld. Question about the Nes signals.
Replies: 13
Views: 594

Re: Mapper 163 in a Cpld. Question about the Nes signals.

Some mapper163 games need to monitor the scanline counter to automatically switch the Chr bank, and the mmc5 level scanline counter mechanism is required. In addition, some games will have copy protection, which can be verified by reading $5100 and $5500, and I think this part of the logic is relati...
by aquasnake
Thu Dec 30, 2021 4:42 am
Forum: Newbie Help Center
Topic: MMC5 extended RAM and fill mode
Replies: 13
Views: 3449

Re: MMC5 extended RAM and fill mode

Well, better it depends... The point aquasnake's made is that writing to exRAM via PPU registers may be faster because of the address auto-increment, but that point is valid for sequential accesses that occurs in VBlank. Outside of (forced) VBlank and for random access, direct access to the exRAM v...
by aquasnake
Thu Dec 30, 2021 1:30 am
Forum: Newbie Help Center
Topic: MMC5 extended RAM and fill mode
Replies: 13
Views: 3449

Re: MMC5 extended RAM and fill mode

There are several ways to access exram: $5104 = 2, cpu $5C00-$5FFF, cpu R/W $5104 = 0, $5105 = 0b1010xxxx, ppu $2800-$2BFF, ppu R/W(when v-split enable bit is not set) or ppu R only at v-split rendering(if v-split enable bit is set) $5104 = 1, ppu R only at attribute table rendering Therefore, gener...
by aquasnake
Tue Dec 28, 2021 9:51 am
Forum: Newbie Help Center
Topic: MMC5 extended RAM and fill mode
Replies: 13
Views: 3449

Re: MMC5 extended RAM and fill mode

In fact, writing $5c00 - $5fff, then switching exram mode and using it as 3rd NT is no better than directly plug-in a 1KB cxram. Because writing $2006 and $2007 is faster than writing $5xxx, the former address is automatically accumulated. In this usage of dual port RAM, the CPU only writes and the ...