nesdev.org

One more update. The above is not quite right. It mirrors the high four index values down, but does not mirror the low four index values up. Fixing it isn't hard though.

Then the wiki is wrong: Address range Size Description $0000-$0FFF $1000 Pattern Table 0 [lower CHR RAM bank] $1000-$1FFF $1000 Pattern Table 1 [upper CHR RAM bank] $2000-$2FFF $0F00 Name Tables [4 banks of $400 bytes] $3000-$3EFF $0F00 Mirrors of Name Tables $3F00-$3F1F $0020 Palette RAM indexes [n...

Ok, after working it all out...The values ARE only mirrored between the pairs. linking all of the values together does not produce correct results. Also, ignoring pairs other than $00/$10 does not produce correct results either. It appears that in order to get correct behavior from the hardware, it ...

Has anybody every come up with a good masking pattern to produce the mirroring effects seen on the palette. Obviously, an AND with $1F will limit you down to the actual table, but within that table itself, four specific locations ($10, $14, $18, $1C) are mirrored down to ($00, $04, $08, $0C). There ...

Hmm, yes, I see. each nametable is $400, $400*4 = $1000. So that means that $3000-$3EFF is not a complete mirror - the last $100 bytes of the lower right name table are not accessible through the mirrored address range?

Ok, I think I got it. The mirroring of $3000-$3EFF down to $2000-$2EFF is done by the cartridge, but $3000-$3FFF never gets put on the PPU address bus during rendering. Lol. That part took me a minute. Let me see if I have it straight. The trick is that if the PPU were to access $3000-$3EFF during r...

So that implies that the bit masking circuitry that causes mirroring on the PPU data bus is entirely internal to the PPU (i.e. it is a feature of the PPU itself, and not the way that the address lines are wired, or the behavior of other chips on the bus processing the address routing, etc...). Add t...

I am maybe just a little confused about HOW the A12 counter works. I understand the concept - that A12 rises and falls as the PPU makes accesses to the two pattern table banks. Since the PPU sucks in all of patterns for one first, and then the other, CHR reads flip over from $0xxx to the $1xxx range...