Search found 24 matches
- Sat Oct 08, 2022 6:49 am
- Forum: SNESdev
- Topic: 4016=1 blocks auto-read, not emulated?
- Replies: 13
- Views: 1494
Re: 4016=1 blocks auto-read, not emulated?
It's mentioned in Fullsnes. I thought it was rather well known but apparently not?
- Sat May 21, 2022 11:09 am
- Forum: SNESdev
- Topic: APU crosstalk 16-bit bug
- Replies: 9
- Views: 829
Re: APU crosstalk 16-bit bug
I'm reasonably sure I tested all of this at some point. According to my vague recollection and notes (do not trust either), I apparently wrote the APU ports from the CPU side with many different types of writes; 8-bit CPU, 16-bit CPU, and various kinds of stacked DMA from successive channels to diff...
- Mon Apr 25, 2022 5:41 am
- Forum: SNESdev
- Topic: Detecting NTSC vs PAL
- Replies: 3
- Views: 628
Re: Detecting NTSC vs PAL
$213F has a bit that indicates NTSC or PAL. Some games use it as a means of region locking. There are some mods and flash carts that can intercept accesses to it to defeat protections like that. Also be aware that there are a handful of older mods that change the refresh without affecting this bit a...
- Sat Dec 05, 2020 3:43 am
- Forum: SNESdev
- Topic: 16x32 sprites in interlaced mode?
- Replies: 2
- Views: 4612
Re: 16x32 sprites in interlaced mode?
The only mention of it as far as I know is here (edit: and here ). I've tested it (on hardware) and it seems to happen with both 16x32 configurations. It does not happen with 32x64 sprites, and that makes it rather puzzling. Just to clarify what's happening: --- Enabling $2133.1 squashes sprites by ...
- Mon Jul 08, 2019 5:27 am
- Forum: SNESdev
- Topic: Mesen-S - SNES Emulator
- Replies: 392
- Views: 292048
Re: Mesen-S - SNES Emulator
0: N4 -> N3 -> N2 -> N1 -> P4 -> P3 -> P2 -> P1 1: N3 -> N2 -> N1 -> P3 -> P2 -> P2 -> P1 -> P1 2: N2 -> N1 -> 03 -> 03 -> P2 -> P2 -> P1 -> P1 3: N2 -> N1 -> P2 -> P2 -> P1 -> P1 -> P1 -> P1 4: N2 -> N1 -> 03 -> P2 -> P1 -> P1 -> P1 -> P1 5: N2 -> N1 -> P2 -> P2 -> P1 -> P1 -> P1 -> P1 6: N2 -> N1...
- Mon Apr 08, 2019 3:24 pm
- Forum: SNESdev
- Topic: A question about Tables, indexing, and banks
- Replies: 7
- Views: 7460
Re: A question Tables, indexing, and banks
You have long modes where you the programmer specify the bank: lda $123456 ; Read from $12:3456 Most other addressing modes will use the bank specified by the DBR (data bank register). Access the DBR with the PHB/PLB instructions. lda #$AB pha plb lda $1234 ; Read from $AB:1234 Stack relative and di...
- Sun Mar 31, 2019 7:03 pm
- Forum: SNESdev
- Topic: how to wladx compile memorycode
- Replies: 12
- Views: 9746
Re: how to wladx compile memorycode
Any decent assembler should be able to handle this case without crazy workarounds. That said, I don't have the experience with WLA-DX to say how to fix this. How would you tackle the same problem with your assembler of choice? How about using ".orga" or the ".base" directives? I...
- Sun Mar 31, 2019 3:14 pm
- Forum: SNESdev
- Topic: how to wladx compile memorycode
- Replies: 12
- Views: 9746
Re: how to wladx compile memorycode
Those use cases might be a bit more exotic than I had in mind. Certainly for the kind of things I've been doing it's been sufficient. I'd be quite content to pretend coprocessors and other such addons don't exist though. In one of those scenarios however I think it should be enough to use the base a...
- Sun Mar 31, 2019 12:50 pm
- Forum: SNESdev
- Topic: how to wladx compile memorycode
- Replies: 12
- Views: 9746
Re: how to wladx compile memorycode
Whenever I've executed code into RAM, I've tried to make sure it doesn't depend on location in any way, so it could be copied to any location and work just the same. That way you don't have to worry about where you load it from, and you don't have to pay attention to how you structure your ROM. It s...
- Sat Feb 16, 2019 9:36 am
- Forum: SNESdev
- Topic: Internal OAM address sprite evaluation
- Replies: 18
- Views: 20791
Re: Internal OAM address sprite evaluation
Well that's that cleared up. It's certainly not how I imagined it all, but it's much better to learn the correct way and the means of getting there. I'll have to re-evaluate some things. There is one other loosely related thing I might as well ask: There is a bug mentioned in one book (i.e. book1 2-...
- Fri Feb 15, 2019 1:43 am
- Forum: SNESdev
- Topic: Internal OAM address sprite evaluation
- Replies: 18
- Views: 20791
Re: Internal OAM address sprite evaluation
This would be difficult to test because... I forgot that your test was using sprites to indicate what had been written. My own tests would prefill OAM with predetermined patterns, perform the reads or writes then display the numeric values to indicate which addresses had been read or written. It's ...
- Thu Feb 14, 2019 9:24 am
- Forum: SNESdev
- Topic: Internal OAM address sprite evaluation
- Replies: 18
- Views: 20791
Re: Internal OAM address sprite evaluation
The part about fetching happening in reverse is a massive breakthrough. I've considered that possibility a few times but I wasn't sure if it were possible to test for it. My OAM write test was very primitive, never venturing past rendering or indeed using sprites in any meaningful way, so I never st...
- Tue Feb 12, 2019 6:38 am
- Forum: SNESdev
- Topic: Internal OAM address sprite evaluation
- Replies: 18
- Views: 20791
Re: Internal OAM address sprite evaluation
I was half asleep when I wrote that and unbelievably distracted. I don't think I processed more than the first half of the OP. That said, I think most of what I said is correct. The part that's clearly wrong is in regards to Uniracers. There is no prior mention of the write being to the last entry i...
- Tue Feb 12, 2019 4:44 am
- Forum: SNESdev
- Topic: Internal OAM address sprite evaluation
- Replies: 18
- Views: 20791
Re: Internal OAM address sprite evaluation
Two dots per sprite is about as close as I've been able to get. The evaluation process needs X and Y, but also the data from the hi table. XY is one word and char/attr is the other, so I've been assuming one word per dot with the hi table bits accessed whenever. As far as I can tell, reads always co...
- Sat Jan 26, 2019 9:20 am
- Forum: SNESdev
- Topic: blargg's SPC test ROMs
- Replies: 34
- Views: 46222
Re: blargg's SPC test ROMs
It seems to run one pass with the running hash, then checks the final result against what it expects. If the two hashes don't match it runs a second pass but logs each interim result along the way. Therefore, one can make it produce that list by damaging the running hash as the first pass is being r...