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The weard thing is the date on the SNES is from 1991. And I believe that the serial number starts with 10 or 11. Could the CPU have been replaced as part of a recall or other similar program?

Well I tried all of the data transfer lengths and no crash. So I guess I can't provide any LA trace data from a crash because I don't get one. By the way my CPU has these markings on it (S-CPU A, 5A22-02, 1HA 71).

I tried the two other address's and no crash. Is it possible that a high rom cart does not cause a crash or my CPU is messed up in such a way that it ironically does not crash? I assume a crash would involve loss of video (or very corrupted video) or controller input correct? If so I have not experi...

Well I just tried the new rom and I left it on $0B99 for 10 min and it did not crash. I will try one address up and one address down for 10 min each and see if I can get a result.

Well I haven't had it crash yet but I have not left it on the address ($0B99) for a great period of time. On that address I did get the most flicker though. As I scanned up the addresses from that one I got a line tearing to the right of the screen that moves down the screen as the addresses increas...

It works now! So far we know that the PLB and PLD instructions are bad. Is there anything else I should test? I think I should get a hot air rework station and find a SNES that has some other problem that is not the CPU.

Well I have checked my connections and they are good. Could the mute pin cause the APU to not work if it was receiving a signal instead of it sending a signal? I put the SNES back on the LA with the fixed PA bus and now it will trigger off $33 on the PA bus. It does read a $BB from the APU but it lo...

I just figured out your confusion! When I was trying to connect up the Arduino to control the APU I noticed that I had connected PA 5 and PA 4 to Sound R and Sound L so every pin from PA 0 to PA 5 was shifted down a pin! I never had PA 0 and PA 1 connected. Whoops! I am still having trouble getting ...

I have successfully triggered off that pattern and have fixed the RAM reset issue. Attached are two LA taces.

I have successfully triggered off that pattern and have fixed the RAM reset issue. Attached are two LA taces.

You have a point there. I am happy that we are learning at least 1 failure mode of a SNES CPU (PLB instructions and potentially something to do with APU setup). Could the CPU be replaced with a CPLD or FPGA (note I would have no clue how to program that type of chip but I am pretty sure I could wire...

I should be able to trigger on any combination of the current inputs that I have coming into the LA from the SNES. So from what I gather I would set PARD to 0, CRD to 0, CA to 2140, and D to AA in the trigger selection correct? I am also going to recheck all of the points that the /RESOUT line conne...

Well the address $2142 I could not get it to reliably trigger on so I am going to assume it would have been garbage as well. The PA=$42 did reliably trigger and I have attached the LA trace. Also just noticed my /RESOUT1 line going to pin 8 on the RAM chip needs to be pressed down for it to make con...

Well I got it to trigger on the $xxE77A and $002133 addresses. How ever I could not get it to trigger on the $33 on the PA bus. The first two that it did trigger on would not always produce the same results on the LA in the fact that sometimes it would continue to different addresses or just start c...

Ok, I will try that tomorrow. I assume these address's are for the A address bus not the PA one or data bus? Or would triggering on $AA on the data bus be better?