I'm not really knowledgeable about UI stuff, but I'm really excited to see new a new Mesen framework. Merging everything into a single front end is really cool, and adding PCE, with cd-rom support no less, is pretty impressive, I recall that system being pretty finicky to emulate well. I'll be looki...

Yes what you have there looks like it matches what I have in my code / notes. I think the only thing that is missing is that if the DMC DMA occurs on the APU cycle before the buffer would be emptied (0 bits remaining in the sample, but non-zero samples remaining) then there will not be another DMC D...

Oh I didn't realize there was a list of such games, maybe I'll get one or two of those and see if I get similar results. It's been a while, but yes I remember it being very consistent. Paperboy never worked without the extra poll, for example. I never got very far in figuring out what mechanism migh...

What does "an extra controller latch" mean? Like you add an extra frame of input to the TAS data, or...? The bot reacts to polls from writes to $4016 just like a real controller, but I have to add in an extra such poll for Paperboy in the data the bot uses for it to work on console compar...

Very interesting results, thanks again for testing. Any speculation on what might be the cause, or why it's mostly the upper bit effected? Thinking back, maybe this is the cause of why some TASes seem to mysteriously need an extra controller latch to sync on console. Paperboy is one example, and it ...

Cool thanks for the test ROM. I don't have a flash cart to test with, but your results are consistent with what I see in the TAS.

Out of curiosity, has a similar test ever been done with plain NROM? Maybe it's not MMC5 related at all.

Is it only reading $6000-7FFF or other places too? Out of bound reads to $2000-3FFF can affect the PPU in lots of different ways, and there's especially a lot of OAM corruption edge cases I don't think we know enough to emulate. The game loads sprite data from the address pointed to by address $0A ...

So the speculation is that some CPU address signals, propagated through the MMC5, might be weakly overriding the open bus in the $6000-7FFF range? Well I'm not sure exactly. I ran the TAS again, and while I consistently get the rectangular pattern (indicating it is only the upper bit of data bus th...

It seems like if the upper bit of the returned byte follows bit 3 of the address, then I get a pattern pretty close, though not exactly matching, what I see on console. I'm not sure why the address and data bits would relate to each other, this is just an example of what makes a similar pattern. Ano...

Is there an easy way to set up that exact moment in an emulator? Is there a password or something that goes there? Well you can download BizHawk 2.8 from here: https://tasvideos.org/BizHawk/ReleaseHistory and then play the movie file from here: https://tasvideos.org/4895M?handler=Download and it wi...

Do you know anything about the source of the video the image is from? Is it definitely a real MMC5 cart on an official system? Could it instead be a flash cart? The image is from video I captured myself from my own cart and my own NES. NES is unmodified, same one I use for all my other testing. Car...

I'm still getting desyncs on console so I compared the wrong warp area to console to see if I could spot any differences. The first thing I noticed is that sometimes the game loads sprite data from what would be the WRAM region (there is none in Castlevania III.) It loads data from there into RAM at...

Yes I see a glitched line on emulator (BizHawk) in certain circumstances in that area (not exactly where your arrow is though, a little further up.)

I also tried on my nes (original cart and original NES) and also see a glitched line in the same way.

Oh cool thanks for the quick turn around on the test ROM. It seems my diagnosis was correct. Not sure how it manages to be off by 2 cycles though, I guess the counter changes at a different point then I thought. Pretty incredible that no other game I had previous tested ran into this case. Or maybe ...

I did some more testing here, and it seems the correct timing is that the cpu sees an IRQ on ppu cycle 8. With some additional DMC details on the NES side this gives correct console playback for Castlevania III. EDIT: Well the playback is correct until a wrong warp that has a lot of crazy stuff happ...