As the Genesis/Megadrive core works, I’d say yes.retrorgb wrote:Wow, thank you! Too bad about the Jag! I wonder if it's powerful enough to run a SNES core as well?
However, this will remain a supposition until I can see the source code.
Search found 3 matches
- Sat Oct 13, 2018 11:26 am
- Forum: SNESdev
- Topic: Introducing the VeriSNES (FPGA-based SNES)
- Replies: 307
- Views: 204045
Re: Introducing the VeriSNES (FPGA-based SNES)
However, this will remain a supposition until I can see the source code.
- Sat Oct 13, 2018 6:15 am
- Forum: SNESdev
- Topic: Introducing the VeriSNES (FPGA-based SNES)
- Replies: 307
- Views: 204045
Re: Introducing the VeriSNES (FPGA-based SNES)
Already done.retrorgb wrote:Those are some impressive cores! Would you consider porting them to the MiSTer project?: https://github.com/MiSTer-devel/Main_MiSTer/wiki
Except for the Atari Jaguar where the requirements are too high.- Fri Oct 12, 2018 5:20 pm
- Forum: SNESdev
- Topic: Introducing the VeriSNES (FPGA-based SNES)
- Replies: 307
- Views: 204045
Re: Introducing the VeriSNES (FPGA-based SNES)
Hi, I just came across this topic, this VeriSNES project looks awesome! I've written some FPGA cores too, especially SEGA Genesis/Megadrive, PC-Engine/TurboGrafx-16 (both in VHDL) and Atari Jaguar (Verilog). See my site http://lvt.tl/ for more information, and my GitHub repos https://github.com/Torl...