nesdev.org

Thanks, I was looking in the settings for controller port 1. I didn't realize the light guns had to be in port 2. Does BSNES support the super scope as an input? bsnes supports the SNES Mouse, the Super Scope, the Justifiers (the paired lightguns used by Lethal Enforcers) and the Super Multitap. I ...

Does BSNES support the super scope as an input? bsnes supports the SNES Mouse, the Super Scope, the Justifiers (the paired lightguns used by Lethal Enforcers) and the Super Multitap. I have some degree of interest in adding support in bsnes-classic for more controller port peripherals, particularly...

This makes no sense to me. What makes no sense ? 1) Does the words I've written make no sense 2) Does the concept of not wanting to ever change register sizes makes no sense 3) Does the concept that I wrote about make no sense (i.e. there is plenty reasons to have a 8-bit accumulator with 16-bit in...

I'm assuming you mean Street Fighter 2? Honestly, after learning more about the SNES and looking at the arcade version of Street Fighter Alpha 2 again, there are so many things that I'd have no clue what to do in trying to port it over. One major thing I saw was a 4bpp BG3, (Street Fighter 2 really...

What I don't get is how they managed to get Street Fighter Alpha 2 to hang for multiple seconds before every fight. Even with a 224-line active display, which they are not using, the SNES should be able to fill all of its memory (VRAM, WRAM, audio RAM) in a little over half a second. There's no SRA...

a single CPU cycle takes from 1.5 to 2 pixels worth of time to execute How is it "1.5 to 2"? Don't all cycles take the exact same amount of time? Or is it really like all cycles take 1.75 pixels or something? Also though, if you're using a fast expansion chip, you shouldn't have to worry ...

This one is rare. As far as I know, mid-scanline BGMODE switching has been done only three times in the history of the SNES - once in a cracktro for Bubsy 2 done by Anthrox in 1994, once in a menu test screen for the RPG Ramsis is working on, and once (well, a few times) in my preliminary work on t...

BG2 in EXTBG is literally the same data as BG1. No extra reading required. Oh, I get it now. Wouldn't that mean that you can only use 128 colors, or is it like BG 1 takes colors 0-127, and BG2 takes colors 128-255? Anyway though, couldn't they have implemented this just as easily on any other mode?...

The nice part about the VRAM gate is that it's got one 8-bit register for each VRAM chip (at least, I'm pretty sure that's how the split works), and you can set it to increment the word address (by 1, 32, or 128) with a write to either one. This means that for Mode 7, you can use a single DMA trans...

Why doesn't it just refresh the RAM on "IO" (internal operation) cycles, which I understand to be cycles when the 65816 is pulling neither /RD nor /WR low, and insert a refresh pause only if there hasn't been an IO in a while? Was that logic too hard for N to implement compared to stealin...

So what you're saying is that with the SNES, it devotes half of the time (hblank) to generating sprites, and the other half (active display) generating BGs, but on these arcade systems, both hblank and active display are spent on both BGs and sprites, it's just that there are more busses? I almost ...

I mean like I'm sure you're aware that these "slivers" are 8x8 and that a 16x16 sized sprite is made of 2, but if we designed our own fantasy hardware around the SNES (but would still be about as expensive) where we instead used 16x16 sized slivers and got rid of 8x8 sized sprites, would ...

However, on that last part AWJ mentioned dp addresses all of bank 0...well then, if I have my data stored at offset $1000 (still in WRAM) and I transfer that to the page register, and alter the data @ that offset, in bank 0, will the WRAM in banks $00-$3F be altered immediately, as well as $7F, or ...

I hope someone sees this, because yet again, the official documentation isn't clear You're suffering from a fundamental misunderstanding. Direct page is limited to accessing the first 64K of the CPU address space. Not the first 64K of RAM, not the first 64K of ROM, but the first 64K of the address ...

I was just looking at the source code of bsnes's 65816 and I noticed something that surprised me a little: RMW instructions (inc, asl, etc.) in 16 bit mode apparently write back the high byte of the result first (unlike 16 bit STA/STX/STY, but like 16 bit stack pushes) Is this documented somewhere o...