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Small(?) update: I am going to switch to PSRAM after all :) A 128Mbit chip is only 1/5 the cost of my current 64Mbits of SRAM and we managed to get the small BGA package soldered with an, uhm, super special custom reflow pizza oven! There will also be a second bus with 4Mbits of SRAM to facilitate p...
Yes, SaveRAM access is not directly passed through to the SD card. The AVR permanently generates a checksum of the memory area. When a change is detected, the SaveRAM will not be saved to SD card until it has remained unchanged again for about 1 second. Of course there are some games which use the c...
- Fri Jan 22, 2010 1:19 am
- Forum: SNESdev
- Topic: What happened with SNES CIC reverse engineering?
- Replies: 248
- Views: 192763
what type of money would I be looking to spend to make it actually happen if you have any ideas? Where would I have to order from and what potential difficulties would I run into? Just curious, it'd be great to have something like this for myself even if you won't be handling the production yoursel...
- Tue Jan 19, 2010 6:39 am
- Forum: SNESdev
- Topic: What happened with SNES CIC reverse engineering?
- Replies: 248
- Views: 192763
The progress is amazing. AFAICS there are only two mysteries left: Instruction $5e (which is not used in the currently dumped SNES CIC ROMs) multiple consecutive ldi instructions. AFAICS the latter are used in seed initialization so it might actually help to have another ROM dump. I do have a spare ...
- Tue Jan 19, 2010 5:14 am
- Forum: SNESdev
- Topic: What happened with SNES CIC reverse engineering?
- Replies: 248
- Views: 192763
Thank you for the details, byuu. So let me think.. my FPGA logic is currently running @86.02MHz, using 6 clocks for one SRAM access cycle, resulting in roughly 70ns per cycle or 14.336 Mwords/s. (Data width is 16bit on the SRAM side, which might be beneficial.) My SRAM is 55ns so there should be som...
I wouldn't mind waiting 15 seconds to load a 32mbit ROM if that means anything. Atleast when I play Mario Kart or some hack of it, it would only be a couple seconds waiting with no need for donor DSP-1 chip. I still have to import a NTSC deck though.. SRAM cost is clearly going to be killer (hope y...
nice. Bonus points for the SD card interface. How long does it take games to load? Say, what is the figure on a 32mbit ROM? It's a good deal slower than the Powerpak, due to the AVR accessing the SD card in SPI mode. A 32Mbit ROM takes about half a minute to load. It should be possible to offload t...
Now, with the PowerPak out and all I'm not sure anybody cares, but there has been some progress. A nice little PCB came out, and then one more with some fixes. And the third revision is on the way. :roll: There are some pics here. Currently there's only Map 0x20, 0x21, and 0x25 support with near-tim...
- Fri Jul 10, 2009 4:10 am
- Forum: SNESdev
- Topic: What is the largest sane SNES ROM size?
- Replies: 20
- Views: 31490
Could you please check the frequencies of the S-CPU and S-SMP clocks? We know the S-SMP typically runs a little faster than spec (~24606720hz instead of 24576000hz stock.) I'd like to know if the S-CPU is similarly off by any significant margin. I'd love to help, but my equipment (Philips PM 3260) ...
- Wed Jul 08, 2009 1:50 am
- Forum: SNESdev
- Topic: What is the largest sane SNES ROM size?
- Replies: 20
- Views: 31490
Does the SuperFX do this, too? No it doesn't. It has to be switched manually by the S-CPU. I was incredibly tired when reading that part on Monday... Edit: ARGH, the SA-1 does not pause the S-CPU at all! Looks like I misread more than I thought. My previous post can be largely ignored. I still wond...