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After several painful days I have thoroughly learned a valuable lesson: "Don't do asynchronous edge detection, ever. Remember: Keep It Synchronous, Stupid." (from https://www.doulos.com/knowhow/fpga/synchronisation/) Here is the latest verilog - would be eternally grateful for any optimisa...

Still poking around in the dark on this... have tried coming at it from a few different angles, but there is something happening at the point the logo fades away and the game should start that I am missing?! Need something I can step through that outlines the sequence of events at startup?

OK... managed to progress past this - the Nintendo® logo appears fine (just needed to tweak the code to ignore RD when CS is not low - hadn't even occurred to me RD would toggle regardless of CS!), next problem is, logo fades away to a white screen, and then nothing. Some Google searches mentioned s...

I'm attempting an FPGA implementation for a basic GBA cart - have gotten as far as the Nintendo logo almost working but becoming garbled towards the end... does this look indicative of something in particular? IMG_20190205_1824026.jpg Wondering if it may have something to do with this (from http://p...

Had a bit of fun experimenting some more with the dual-port CHR-RAM tonight - overwriting the nametable palette attributes in Galaxian with rotating values... disco aliens!!

https://www.youtube.com/watch?v=VhZj0wh9AVE

Only the Palette RAM at 0x3F00 to 0x3FFF is not accessible - "writing to the internal palette range (3F00-3FFF) will not assert /WR" (from https://wiki.nesdev.com/w/index.php/PPU ... escription)

It would be cool if the whole PPU memory was dual-ported, name tables included. It'd actually be nice to have more than 12KB of it too, that the NES could access through bank switching. Name tables are included. I have 'CIRAM /CE' ('VRAM /CS') held high on my cartridge breakout board, which disable...

This looks neat. I'm reminded of a similar project by Batsly Adams from a while back Yes! I remember reading this one too (PS. the spammers have really gone nuts in the comments on Batsly's blog... :cry: ) Dual-port RAM is heaps of fun to play with! I used a dual-port FIFO in another project contro...

Pretty cool! Since you're using 1bpp graphics, you could actually have 1024 unique tiles using a little palette trickery... You can display the individual planes of an NES tile by using the following palettes: Black, white, black, white: plane 0 will show; Black, black, white, white: plane 1 will s...

I think you could use A15 (and an inverter) to select between the two RAMs' chip enables. ... or if you want a really cheap option, A14 and A15. (After all, the internal RAM keeps you from accessing most of the region where A15 and A14 are both low, and you wouldn't want to address both RAMs at the...

So, I had a crazy idea and decided to follow it through... I have created a shield for the Arduino Mega 2560 that substitutes two 16K dual-port RAM chips in place of the PRG & CHR ROMs, and a breakout board to connect the necessary signals to the NES cartridge port. IMG_20171108_1454412.jpg IMG_...

Designspark PCB file with board outline and mounting holes: https://dl.dropboxusercontent.com/u/18341918/INL_ROM_pcb_outline.pcb Here's my current Designspark NES library might be needed for 72pin connector. I save every component I've ever created in this library so if you're making boards it coul...

What's your thinking on 313K? 0-5v signal from mcu, trying to get down to 200mV is a factor of 25. Thus you need 20k * (25 - 1) = 480K..? Was just going on lidnariq's numbers from earlier in this thread: http://forums.nesdev.com/viewtopic.php?f=9&t=56&start#p205492 Both CPU pin 1 and Expans...

infiniteneslives wrote:Did some testing of my own because I'm looking to do the same thing!

Great minds

...and you plan on adding 313K of resistance to compensate? or you have a better solution in mind?

Had to look up Mapper 218 - love it!

Good to at least have confirmation of the 0.3V - thanks again for all of your input on this!