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i see opcode halt about http://www.devrs.com/gb/files/faqs.html#HALT There is such a description. ------------------------------------------------------------------------------ HALT operates differently depending on whether the Interrupt Master Enable (IME) is set or reset. Assembly command EI sets ...

good advice! thanks, everyone.
especially tepples && rainwarrior && dougeff. to make me more deeply understand the meaning of IRQ

http://www.thealmightyguru.com/Games/Ha ... ?title=BRK
This is correct ? please tell me why. gentleman/lady thanks

No GUI, difficult to debug PPU it is a long way.
I learned about half a year is also wrote a no sound demo (I know DirectX/Win32SDK)

Hello and welcome. No, loading for example LDA($F0,X) does not nessesarly load from the CPU's 2k of RAM. It can load from anywhere within the CPU adress space, including RAM but also ROM and memory mapped I/O. Note that this does not depend on the addressing mode, in 6502's case. There exist other ...

hi ... i'm from china ... a pro noob ... my english level not also high .. -_- ... i just want to ask ... emmm ... for example ... LDA ($F0,X) lda load 's var addr always at cpu's 2K ram ? ... ps: my write 's masm pro ... (not write over yet) .686 ; create 32 bit code .mmx .xmm .model flat, stdcall ...