nesdev.org

That's really useful information !!! Thank you so much,

As to why I couldn't find that reset vector while searching, well, let's say I screw up and opened DK in the NES debugger, and opened DK jr in the hex editor .. =D

Yes I've read most of those pages. Still can't get it, I searched the rom for "9E C7" with a hex editor and couldn't find it. So where is it supposed to be ? Also, that DK rom has a size of 0x6000. Am I supposed to map it entirely to 0x8000 - 0xFFFF ? I read that these older games, maps th...

Hi ! Sorry for this very noobish question, I just took some time from my almost complete GB emulator, and wanted to try some NES stuff. I just started reading documentation, played with FCEUX debugger, and tried to understand about this reset vector, that when read, the program counter is assigned t...

I guess nobody truly knows, What I've seen implemented in some emulators is that ly = 0 when the LCD is just turned on has 456 cycles and when it hits VBLANK, ly = 0 has that double timing behaviour (456 * 2). I have it like that on my emu, but my interrupt code is a mess. Not really sure if theres ...

The game has lots of weird programming choices. On startup for example, the game will attempt to erase the graphic memory (area 0x8000 onwards) while the screen is on and not even checking the stat mode, so some of the data is not erased. It looks like the original developers just made it work witho...

Nice info.

I finally had Altered Space working, but that irq blocking test still fails. So Im not really sure if I want to keep working on the PPU without accurate information, which at the moment seems nobody has it.

I will continue with the audio emulation, which is terrible on my emulator

Any news on this ? Seems like an interesting find, maybe some graphic behaviour that got cancelled before release ?

Managed to get all timer tests passing ! That was a lot of work, but timing looks much more accurate now. Now I'm trying to understand one of your new tests, stat_irq_blocking Altered Space 3D is using all those stat 1 interrupts, and it's one of the few games which don't work ok (sprites are a mess...

Ok that's useful, I'm already getting some channel 4 noises. I have implemented the 15 bits linear feed register, and the 7 bits mode. Those are looking correct now. How about this ? NR43 FF22 SSSS WDDD Clock shift, Width mode of LFSR, Divisor code I cant understand the relation between "Clock ...

ok, after some time, I managed to get some channel 1 and 2 working. There are still some bugs and some audio delay, but I'll have to fight with them later. I wanted to start implementing channel 3 and 4. After reading that document, I don't understand any of it. Channel 3 is a wave generator, so I g...

mmm, I think something is still wrong with my implementation. Look at this, first line is inverted, and the rest start with black line.

What's the correct pattern for your test ?

Ok, fixed it by doing exactly like that, As soon as mode 3 starts, I locked the scroll X register. But it can still be writtable.

This is the result, I wonder if it's accurate enough (is it supposed to have those white blocks at the right edge ?)

Very interesting stuff.

So the idea is, that when the LCD enters mode = 3, the scrollX gets locked ? Or should that be mode 2 ?

Just for the sake of comparisons, here's your test with my rom (also failing of course).

That's awesome, I implemented it, and it looks like it works, so I'm ok with it. Another thing that some people may struggle at first, is that the rom informs in its header, that it has 2 rom banks, when in reality it has more than 300. That link had everything I needed, now back to improve other as...

Hi ! I'm trying to improve my video emulation, and now only a couple of games still have issues. One of those is this video with the intro of pokemon. I read the other thread, implemented that additional OAM 2 interrupt, and it plays till the end. However, something is wrong on my tiles logic, video...