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Timer (TIMA) works at M-cycle granularity (not at instruction granularity!). With that you mean it has it's own clock right? So, if the say in the next 8 cycles the TIMA will overflow and trigger an interruption. The CPU's next Instruction happens to be 16 cycles. So it would first check the state ...

So the first instruction, the CPU actually reads (FF) in 1 cycle, then it reads the remaning in the other 3 cycles. After that it does the FF thing again, then do the load for 3 cycles? How does the TIMA and Interruption work in these cases, aren't those essentially pseudo-async to the CPU? I mean t...

Yeah that's what i am asking.

And that part i get, but was wondering about the Timer and Interruption.
Those are updated on a per instruction basis right?

At least the effect they do?

is -3 to 0 one instruction?

isn't cycles bundled together in the entire instruction?

Wait this got a bit confusing hehe. I always count in cycles (not instruction cycles), so 4 being the minimum. So is 640 cycles is correct then? Cause that's how much mine takes until it's out of the wait loop. It's really hard when the documentation is so fluffy at times, i usually read all over th...

Don't really understand why all documentations says that DMA takes 160 microseconds, and that the default wait loop waits about that long. But if i am not mistaken, it's doing 40*16 cycles, 4 for decrementing A and 12 for JR NZ. And that's 640 cycles, which is not 160 microseconds, as that would be ...

Ah thanks that clear things up, appreciated:)

Ah, seen the word atomic used a alot and never been too clear on the meaning, except it seems to mean "close/directly by by the cpu" or something. So that's basically what it is then, and atomic operation is completed by the CPU without any interference from whatever could interfere more o...

A bit confused, don't really understand the relevant post (apparently a bit too low level for my understanding of these things i guess). But as far as i know, there is no "0xCB" flag, at least not a visible one, which of course doesn't mean it doesn't exist at all. So, is there a way to de...

Hi, I can't seem to find information regarding how 0xCB instructions are handled by the CPU when it comes to the Timer and Interruptions. Meaning, is the 0xCB read as an instruction and then handles things etc, then it reads then ext instruction from the 0xCB table. Or is 0xCB read and immediately a...

Great explanation.

Confusing, but i think i get a better grasp at it.
I seem to at least be able to remember what to do so that's something;P

Much appreciated:)

Now i need to figure out what's wrong with me timer as some timing tests fails which i find inconsistent.

Hmm, well my method was to just do precisely as the Table said, with a ton of If/Else, but there are some cases which just doesn't exist, which you might be talking about. I tried the code you linked and it works. Though i am a bit confused how. I have read up on BCD, and i get the principle of it, ...

Hi, I am working on a GameBoy Emulator, it's my first Emulator and i have learned a lot. So beforehand, i Don't want a copy paste answer, i want a discussion to help me understand as i am a Very Slow learner, and just looking at the answer directly doesn't yield me much, and i also want to try to ge...

Anything that breaks the hardware rules will glitch the games. It's fun... until the time something glitches and so... "is that normal to happen"? As I said, the bad side of using an emulator for messing up the hardware defaults. A few guys fired against me regarding the lack of such feat...

The link being shown under the door actually happened to me without any features activated. Or well not like that though, but only one place, but it's like a black space between the "Menu" and the Map. How is overclock affecting games, is it safer? As for complaining. I am not complaining,...