nesdev.org

SInce I am no longer seeking a hardware solution, I should probably answer your question in my nesdev thread. But basically I dont have a set framerate in mind, so long as it seems smooth. I'd be willing to go every 2 frames, 4 frames or whatever seems nice and playable.

Al

Thanks for the replies fellows. You can consider the topic finished I'll try using the tecnhnique in the smurfs thread to squeeze in 16 tile updates per vblank, and I'll be doing the Sprite DMA every 2 frames (30 fps) so that I can update both 32x32 pixel (4x4 tile) fighters. I'm a lot more comforta...

You guys can consider this thread finished. As for the game. I'm in design paralysis for over a month now on my fighting game. If I make my fighters 4x4 tiles(32x32 pixels) I can have at most 8 positions (since I have 2 fighters). I already know that I can squeeze out more positions if I re-use tile...

You *are* aware that copying 64 tiles from one memory location to another would take more than 25% of the CPU cycles in a frame? That means being sloppy in this place only means you'll have to do better in other places, such as doing all other game routines in 75% of the total cycles you could have...

You cannot access the same single port memory by two devices at a time. It doesn't matter if it's the bank the PPU is using or not, the PPU is using the address and data bus which are necessary to get data in and out of the RAM. In the other thread I described a mapper which has two CHR RAMs, one o...

Based on a thread in the nesdev forum, I'm interesting in trying to figure out whether its possible to create a special mapper. Basically this mapper would allow RAM to be switched between PRG RAM and CHR RAM. So one bank becomes used as CHR Tiles, while another now becomes accessable as PRG RAM. Ev...

Based on the responses in this thread, there are no existing mappers that do what I would like to to. I'm going to create a separate thread in the hardware forum to discuss details on developing a mapper to do this since I think it would be very powerful and useful.
Al

I understand what you are saying now. I mistakenly thought all 16 KB of PRG RAM was accessable without swapping between them. Obviously its not, and I cant safely switch because part of its in use by the PPU.

Thanks,
Al

With SOROM would I not be able to do the following: For odd frames: During VBlank: bank switch to PRG RAM bank 1 ($A000-$BFFF) During frame render: write the next CHR update to PRG RAM bank 2($C000-$DFFF) For even frames: During VBlank: bank switch to PRG RAM bank 2 ($C000-$DFFF) During frame render...

The only way to write to CHR RAM is to do so through the PPU or to create your own mapper with RAM which can be accessed by both the CPU (or mapper registers) and the PPU bus. Yes this is what I was wanting. I was reading about SOROM but I;m not sure it would do what I want. http://nesdevwiki.org/w...

Edit- Based on the responses in this thread, there are no existing mappers that do what I would like to to. I'm going to create a separate thread in the hardware forum to discuss details on developing a mapper to do this since I think it would be very powerful and useful. Original post in italics. I...

I just created an account and was able to login and edit pages (although I didnt submit any edits). I am on Windows XP using Internet Explorer 7. Edit- I also tried on Win XP using Firefox 2.0.0.6 and was able to edit as well. Edit2- I tried from another machine and was successful as well. Mac OSX 1...

I would like to propose a page on the wiki that talks about the pros and cons of each of the different NES assemblers.

Al

There is a tutorial NES 101 on the main page.

It is the generally accepted tutorial around here.

www.nesdev.com/NES101.zip

Al

I remember hearing something about this:

LDA ($1B),Y
is compiled to be this:
LDA ($001B),Y

So I think you need to define it like:
LDA (<$1B),Y

(My syntax is likely wrong since I never use nesasm)

Al