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Dwedit wrote:A11 for the nametables only, not for the CHR RAM, correct?

Correct; I did it in a way that would be like unplugging A11 from the PPU.

Got excited when I realized that I have a bunch of cheapo 40-pin sockets laying around... Folded pin 27 (A11) out of the way, and booted it up. It ain't perfect, but it's a step in the right direction! Disclaimer: I did not ground or tie the pin to +5V yet, do you think that might clear up what's in...

I was pretty tired when I was working on this late last night -- so I might have a few minor mistakes. I tried to be as accurate as possible, but on the pins that are marked "NC" and "NC?", maybe I just wasn't able to trace them down. I plan to review them, and post an update in ...

Oh, I also re-ran the Characterization test again, but on the master side this time.

With all dips OFF - System reported DIPSWITCHES: 00 00
With all dips ON - System reported DIPSWITCHES: 18 FC

Just thought I'd follow up and mention that.

I think I'm satisfied with the VRC now, so it'd be lovely if you could determine the connectivity of the 74'139... 74LS139 Dual 2-Line to 4-Line Decoder / Demultiplexer Pin 1 /1Enable: Pin 11 Pin 2 1Da: PRG1 and PRG2 A12 (Pin 2) Pin 3 1Db: CPU A13 (Pin 17) Pin 4 /1Y0: NC Pin 5 /1Y1: (127) Pin 20 Pi...

I think I'm asking specifically about the headers that pass through to the system. If the whole thing is a sandwich with these layers: PPU socket daughterboard pins mainboard this would need to interpose between the daughterboard and the mainboard ... but if the socket and pins are one and the same...

However, the tricky bit is that the CHR ROM (or CHR RAM in the case of UNROM) on the daughterboard still needs to retain access to both signals. What do the sockets look like on the underside? Are they a combination socket-and-pin-header? Or might it be possible to get something in between the two?...

A daughter modification would be the most "accurate" in the spirit of NES mirroring controlled by the Game Pak. I'm starting to think that's really the way to go. Can't I just run A10 from CIRAM to either the PPU's A10 (vertical) or A11 (horizontal) pins? If so, that seems like it would b...

I think I'm satisfied with the VRC now, so it'd be lovely if you could determine the connectivity of the 74'139, the two 74'00s, the DIP switches, the 127, and ... what are those two diodes (1S1588) doing? Okay, I'll report back after I've mapped those things out. May take me an extra day or two, a...

Let me know when you're ready to crack the mysteries of the VS RBI Baseball daughterboard.

1- For the VRC-using one (for Vs. Goonies and Vs. Gradius), could you find out what (if anything) VRC pins 15 and 17 are connected to? Pin 15, is a solder pad that is not connected by default, but if it were bridged, it would be circling back to pin 20 on the VRC. Pin 17: No connection. (Maybe also...

lidnariq wrote:... but to do anything more clever I'd need to know how the other ICs are attached.

Okay, I can do some tracing on the Atari RBI Baseball daughterboard to see where the pins in question are going.

I really quickly modified the header in a copy of Contra (U) [!] to indicate 4-screen nametables ... and, yes, it breaks. Apparently it sets the Y scroll value to show the lower nametables but draws the first stage (at least) to the upper nametables. Thanks for checking on that, Lidnariq. So now I ...

Okay, so I have the following daughterboards: Gradius (Goonies) board Atari RBI Baseball VS Castlevania I think that's all I have currently. So there are definitely more that I don't have, but I wasn't making the distinction between the different types of copy protection, etc. And I also have access...

NovaSquirrel has a Raspberry Pi and may be able to help you get an emulator running. No worries, there. I can get something up and working later on, I was just asking because I'm at work currently. I'm pretty sure FCEUX (SDL version) supports 4-screen, and you can probably compile that yourself on ...