Search found 32 matches
- Fri Mar 30, 2018 11:23 pm
- Forum: SNESdev
- Topic: DMA and dram refresh cycle
- Replies: 3
- Views: 3138
Re: DMA and dram refresh cycle
You're right, and I did the same in my project, active REFRESH signal disable CPU core and DMA, only delay counter I have one (common for DMA and 65c816). I'll rewrite the code DMA/HDMA. 2. [if DMA] if DMA delay counter = 0 then step the DMA engine; increment the DMA delay counte...
- Fri Mar 30, 2018 1:32 am
- Forum: SNESdev
- Topic: DMA and dram refresh cycle
- Replies: 3
- Views: 3138
DMA and dram refresh cycle
I create a SNES on FPGA. And now I tested several small games with simple LoROM mapper (Dr.Mario, Super Mario World 1, Tetris Attack, Battletoads, Tom and Jerry, Daffy Duck, Sim Sity). All tested games works well. But one game (Sim Sity) works with damaged sprites (and backgrounds, and objects). I f...