Xilinx CPLD breadboard/socket dev board

[qwertymodo]

This was a bit of a personal project, but after seeing projects like this, I realized maybe somebody around here might be interested. Basically, I made a dev board for the Xilinx XC9500/XL CPLD chips that breaks out to a DIP-32 pinout for breadboard and socket compatibility. Pin 16 is GND and pin 32 is Vcc, the other 30 pins are all I/O's. There were a few I/O's left over, so I added 2 on-board LED's, a debounced tactile switch on the GCLR pin, and a crystal oscillator on GCLK1, along with footprints for either a standard HC-49 crystal/resonator or a surface-mount 32.768kHz tuning fork. There's also an on-board voltage regulator that allows you to drive your I/O at a different voltage than Vcc (with a solder jumper to select between Vcc and Vreg for Vccio). The JTAG header for programming and debugging is broken out on the end of the board, and doesn't interfere with breadboard/socket insertion. I'm thinking of making one minor change for a future revision to add another solder jumper to allow the chip's Vcc to be supplied via the regulator, so then you'd have the option of Vcc = Vin or Vreg and Vccio = Vcc or Vreg (that way you can't select Vcc = Vreg and Vccio = Vin, because that would be bad...). Any interest, suggestions, criticisms?

[Jarhmander]

This is awesome. Is there a way to develop for FPGA on linux? (without using Wine of course)

[qwertymodo]

I haven't gotten into FPGA's yet, so I don't know, but a cursory Google search seems to indicate Xilinx ISE kinda works