So I've mentioned it some other threads that I've come to realize that most of my focus with my boards has been on 'greater than discrete' designs. Yes my v1 'eprom' boards still (and will always) support discrete mappers, but from an assembly and board size standpoint they aren't very efficient. My v2 boards showed me that there is interest in a fully assembled kazzo flashable board, but v2 cut out discrete mappers for the most part. And lets not forget that discrete mappers can still pack a punch and meet the needs of most developers. Many of our favorite licensed and nearly all recent released homebrew titles run on discrete mappers. On top of that I've got a few homebrew titles that I'm expecting to help people publish in the upcoming months that would benefit from a simple discrete mapper board.
With that I created yet another multi mapper board targeting this need specifically.
Goals of this board:
- Low cost
-pcb outline is as small as possible while still fitting in original case's outline.
-Low chip count
-entirely 5v
-full surface mount - Easy to use
-No soldering required by end user
-optional toggle switch for mirroring select
-flashable via cart connector with kazzo - Designed for manufacturing
-Minimal jumpers
-'Smart' jumpers on top of board (closed by solder stencil) - Versatile and capable
-Support as many configs as possible. (I can't help myself)
-Get the most features possible for FREE or negligible cost for homebrew use.
-NES in system flashability for saves.
-get some use out of that CHR-RAM which is at a minimum 32KB.
NROM, NROM w/CHR-RAM, BNROM, AxROM, CNROM, Color Dreams, and UxROM including nearly every variant I can think of... All of the configs below are supported.
UxROM variants, and my proposed naming to try and 'standardize' the ambiguousness of "UxROM style":
UNROM: Plain old vanilla mapper #2 128KB PRG-ROM, 8KB CHR-RAM
-already named for us by Nintendo
UOROM: Plain old vanilla mapper #2 256KB PRG-ROM, 8KB CHR-RAM
-already named for us by Nintendo
UPROM: identical to above (still mapper #2), but expanded to 512KB PRG-ROM, still 8KB CHR-RAM.
-UxROM traditionally has a different letter based on the PRG-ROM size. 'P' seems the logical choice to me.
-While this is still mapper #2, the term "UPROM" gives indication that it's a non-Nintendo board design.
-As I understand the BK2 uses this exact config.
URROM: This is actually based on reverse engineering of Retrozone's boards used for BK2 (aka retrozone UNROM 512).
-The "R" in the name signifies retrozone's design, I believe the new game study hall uses this for saves on flash.
-The basic PRG-RAM banking is mapper #2 compatible with mapper bits 0-5 (512KB)
-Up to four 8KB CHR-RAM banks (32KB total CNROM style) with bits 5 & 6 of the mapper register.
-Optional single screen mirroring (AxROM style) with bit 7 of the mapper register.
-In system flashable by NES for saves on PRG-ROM.
-NES Flashing is provided by adding a '139 address decoder:
. $8000-BFFF: write to flash.
. $C000-FFFF: write to mapper register.
UIROM: This is my own creation, hence the "I" in the name.

-It supports everything the retrozone board does, but has a few extra features with fewer chips even.
-The basic PRG-RAM banking is mapper #2 compatible with mapper bits 0-5 (512KB)
-Up to four 8KB CHR-RAM banks (32KB total CNROM style) with bits 5 & 6 of the mapper register.
-Optional single screen mirroring (AxROM style) with bit 7 of the mapper register.
-In system flashable by NES for saves on PRG-ROM. No decoder used, stole a free NOR gate to invert M2 and drive PRG-ROM /CE. (details here)
. $0000-7FFF: write to flash.
. $8000-FFFF: write to mapper register.
So what other hardware is sitting around on the board unused? Well there's two NOR gates not doing anything yet, and we could probably make better use of that 32KB of CHR-RAM. So let's use the NOR gates to fix the 'last' CHR bank to PPU $2000-3FFF. This is similar to how UNROM provides a fixed and swappable bank in PRG-ROM space, except we use CHR A13 to override the mapper register when CHR A13 is high.
While this trick doesn't work on consoles which don't allow 4 screen mirroring, it's useful and free to use on proper consoles. So the 'last' 8KB CHR-RAM bank is fixed to PPU $2000-3FFF which gives 4 screen mirroring. The best part I think is that it provides ~4KB of extra scratch ram for the CPU. Sure it's a little obstructed behind the PPU $3000-3FFF (less palettes) and only available with rendering off or during Vblank, but beggars can't be choosers. It is 'free' ram after all!

I can think of one place where that PPU scratch ram would be very useful and quite fitting. The PRG-ROM flash sectors are 4KB in size. So using that ~4KB of CHR scratch ram might be a nice place to temporarily store things during flash erase/write operations. Although I suppose one could coordinate to use NT/PT ram for the same purpose. But this would give a 'designated' non-shared location just the right size.
Well anyways, I just finished up the board design and will have the first batch in ~month. Here's a little preview. As you can see several of the chips are overlapped with other chips that aren't used at the same time. That cut down on the jumpers and board space quite a bit. To make assembly easier I've designed up separate solder stencils for each mapper/config. So choosing the right stencil shows exactly which locations need populated. That and the stencil can place paste on the desired jumpers to take care of jumper selection for the config with relative ease.
