INL-ROM v3 DISCRETE dev/repro flash boards

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infiniteneslives
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INL-ROM v3 DISCRETE dev/repro flash boards

Post by infiniteneslives »

Merry Christmas nesdev! I present you another of my board designs.

So I've mentioned it some other threads that I've come to realize that most of my focus with my boards has been on 'greater than discrete' designs. Yes my v1 'eprom' boards still (and will always) support discrete mappers, but from an assembly and board size standpoint they aren't very efficient. My v2 boards showed me that there is interest in a fully assembled kazzo flashable board, but v2 cut out discrete mappers for the most part. And lets not forget that discrete mappers can still pack a punch and meet the needs of most developers. Many of our favorite licensed and nearly all recent released homebrew titles run on discrete mappers. On top of that I've got a few homebrew titles that I'm expecting to help people publish in the upcoming months that would benefit from a simple discrete mapper board.

With that I created yet another multi mapper board targeting this need specifically.

Goals of this board:
  • Low cost
    -pcb outline is as small as possible while still fitting in original case's outline.
    -Low chip count
    -entirely 5v
    -full surface mount
  • Easy to use
    -No soldering required by end user
    -optional toggle switch for mirroring select
    -flashable via cart connector with kazzo
  • Designed for manufacturing
    -Minimal jumpers
    -'Smart' jumpers on top of board (closed by solder stencil)
  • Versatile and capable
    -Support as many configs as possible. (I can't help myself)
    -Get the most features possible for FREE or negligible cost for homebrew use.
    -NES in system flashability for saves.
    -get some use out of that CHR-RAM which is at a minimum 32KB.
Supported mappers:
NROM, NROM w/CHR-RAM, BNROM, AxROM, CNROM, Color Dreams, and UxROM including nearly every variant I can think of... All of the configs below are supported.


UxROM variants, and my proposed naming to try and 'standardize' the ambiguousness of "UxROM style":


UNROM: Plain old vanilla mapper #2 128KB PRG-ROM, 8KB CHR-RAM
-already named for us by Nintendo

UOROM: Plain old vanilla mapper #2 256KB PRG-ROM, 8KB CHR-RAM
-already named for us by Nintendo

UPROM: identical to above (still mapper #2), but expanded to 512KB PRG-ROM, still 8KB CHR-RAM.
-UxROM traditionally has a different letter based on the PRG-ROM size. 'P' seems the logical choice to me.
-While this is still mapper #2, the term "UPROM" gives indication that it's a non-Nintendo board design.
-As I understand the BK2 uses this exact config.

URROM: This is actually based on reverse engineering of Retrozone's boards used for BK2 (aka retrozone UNROM 512).
-The "R" in the name signifies retrozone's design, I believe the new game study hall uses this for saves on flash.
-The basic PRG-RAM banking is mapper #2 compatible with mapper bits 0-5 (512KB)
-Up to four 8KB CHR-RAM banks (32KB total CNROM style) with bits 5 & 6 of the mapper register.
-Optional single screen mirroring (AxROM style) with bit 7 of the mapper register.
-In system flashable by NES for saves on PRG-ROM.
-NES Flashing is provided by adding a '139 address decoder:
. $8000-BFFF: write to flash.
. $C000-FFFF: write to mapper register.

UIROM: This is my own creation, hence the "I" in the name. ;) Perhaps U4ROM is a better name though..
-It supports everything the retrozone board does, but has a few extra features with fewer chips even.
-The basic PRG-RAM banking is mapper #2 compatible with mapper bits 0-5 (512KB)
-Up to four 8KB CHR-RAM banks (32KB total CNROM style) with bits 5 & 6 of the mapper register.
-Optional single screen mirroring (AxROM style) with bit 7 of the mapper register.

-In system flashable by NES for saves on PRG-ROM. No decoder used, stole a free NOR gate to invert M2 and drive PRG-ROM /CE. (details here)
. $0000-7FFF: write to flash.
. $8000-FFFF: write to mapper register.

So what other hardware is sitting around on the board unused? Well there's two NOR gates not doing anything yet, and we could probably make better use of that 32KB of CHR-RAM. So let's use the NOR gates to fix the 'last' CHR bank to PPU $2000-3FFF. This is similar to how UNROM provides a fixed and swappable bank in PRG-ROM space, except we use CHR A13 to override the mapper register when CHR A13 is high.

While this trick doesn't work on consoles which don't allow 4 screen mirroring, it's useful and free to use on proper consoles. So the 'last' 8KB CHR-RAM bank is fixed to PPU $2000-3FFF which gives 4 screen mirroring. The best part I think is that it provides ~4KB of extra scratch ram for the CPU. Sure it's a little obstructed behind the PPU $3000-3FFF (less palettes) and only available with rendering off or during Vblank, but beggars can't be choosers. It is 'free' ram after all! :)

I can think of one place where that PPU scratch ram would be very useful and quite fitting. The PRG-ROM flash sectors are 4KB in size. So using that ~4KB of CHR scratch ram might be a nice place to temporarily store things during flash erase/write operations. Although I suppose one could coordinate to use NT/PT ram for the same purpose. But this would give a 'designated' non-shared location just the right size.


Well anyways, I just finished up the board design and will have the first batch in ~month. Here's a little preview. As you can see several of the chips are overlapped with other chips that aren't used at the same time. That cut down on the jumpers and board space quite a bit. To make assembly easier I've designed up separate solder stencils for each mapper/config. So choosing the right stencil shows exactly which locations need populated. That and the stencil can place paste on the desired jumpers to take care of jumper selection for the config with relative ease.
Image
If you're gonna play the Game Boy, you gotta learn to play it right. -Kenny Rogers
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qbradq
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Re: INL-ROM v3 DISCRETE dev/repro flash boards

Post by qbradq »

Allow me to wipe the drool from my face.

*wipe*

Yay! I LOVES YOU MAN!!!

Will the first batch be available for purchase on your site, or will we need to contact you to special order them? Can you help me understand if there will be WRAM available on the board?

Thanks!
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infiniteneslives
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Re: INL-ROM v3 DISCRETE dev/repro flash boards

Post by infiniteneslives »

qbradq wrote:Will the first batch be available for purchase on your site, or will we need to contact you to special order them?
I'll put them on my site when they're ready for full production.
Can you help me understand if there will be WRAM available on the board?
There isn't any WRAM in the traditional sense (CPU $6000-7FFF).

Are you referring to this?
So the 'last' 8KB CHR-RAM bank is fixed to PPU $2000-3FFF which gives 4 screen mirroring. The best part I think is that it provides ~4KB of extra scratch ram for the CPU. Sure it's a little obstructed behind the PPU $3000-3FFF (less palettes) and only available with rendering off or during Vblank, but beggars can't be choosers. It is 'free' ram after all! :)
In reality you can still make use of all that CHR-RAM as scratch RAM on clones without much effort. Since it can only be accessed when the PPU is off or Vblank, it's not that big of an expense have the requirement of bankswitching in a 'scratch ram' pattern table into $0000-1FFF for read/write access. On an original NES you'd just have the relative convenience of fixed designated PPU RAM at PPU $3000-3FFF. That of course assumes you're not trying to use the same locations of that last bank as a pattern table too.

I'm not saying that having scratch PPU ram is anywhere near as useful/capable as CPU PRG-RAM/WRAM. But IMO if you really NEED PRG-RAM you should be upgrading to something with a CPLD mapper on the level of MMC1 or greater. This provides a little something for nothing to someone who really wants to stay within the hardware costs of UxROM. You could always do this with only 8KB of CHR-RAM, but there's at least 32KB sitting there on the cart if it's made with new parts. So might as well make it accessible for some use.

The other thing is with four banks of CHR-RAM you can fake finer CHR banking by making several copies of 'fixed' data in all used banks.
If you're gonna play the Game Boy, you gotta learn to play it right. -Kenny Rogers
lidnariq
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Re: INL-ROM v3 DISCRETE dev/repro flash boards

Post by lidnariq »

There were only two discrete logic games during the commercial era with PRG RAM: Family BASIC, and Impossible Mission 2 (NINA-001).
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Re: INL-ROM v3 DISCRETE dev/repro flash boards

Post by tepples »

If you want to make a game on the iNES version of a discrete mapper (which implies 8K PRG RAM and no bus conflicts), you could always mapper hack it to mapper 28, which uses the cheapest CPLD.
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Re: INL-ROM v3 DISCRETE dev/repro flash boards

Post by qbradq »

Just making sure I understood what was being offered. The ability to provide save games in flash on a discrete board is pretty awesome :D
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