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Is it a knockoff Namco 108 clone? That would explain having to implement the MMC3 IRQ (the 4020), the ability to swap left/right pattern tables and $8000/$c000 in PRG (the 74'151), and needing to implement extra bits to get 128 KiB of CHR.
Last edited by lidnariq on Thu Jan 22, 2015 2:16 am, edited 1 time in total.
Ok, the 74'259 (addressable 8x1 latch, parallel out)+74'151(1 of 8 multiplexer) together make CHR A16, increasing CHR from the 64 KiB supported by the N108 to 128KiB.
The 74'161 latches the data written to $8000: the register address.
The 74'138 decodes four of the eight registers the MMC3 nominally has. I can definitely allocate for $E000, $8000, and $8001, I'm not really certain what the last one would be. Probably $E001.
The 74'74 both contains the IRQ enable bit and the "IRQ fired" bit. Interestingly, both halves seems to be latching CPU A1, not just a fixed value.
The 74'02 both generates CHR/CE with NOT(NOR(PPU A13,PPU /RD) and ... something else, I can't see what those traces are doing.
The 74'4020 seems to connect its Q9 bit to the 74'74's 1/CLK input, or an interrupt after 1024 somethings ... probably M2 cycles. (almost exactly 9 scanlines, FWIW)
I can't figure out what the last IC is. Its silkscreening is really hard to see in the photo, but it appears to be connected to CPU D0..D3.
Hahah, look at the completely random brand selection on those chips! It's like they wanted to be sure to use one of everyone's chips - I see Signetics, NEC, Mitsubishi, Goldstar, Hitachi, one I can't place, and of course the unlabeled packages.
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