SMBJ2 (mapper 40) a'ka 1990 Super Bros.4 - rev en

[krzysiobal]

Finally got this rare SMB2J based on discrete chips (no PAL). It turned out to be mapper 40. I was wondering how did they wire all these chips to achieve that weird fixed banks. (I was able to do it using 2 chips less back in the days).

Funny how they used 2 NAND gates to make latch for IRQ assert/deassertion. And how the PRG/CHR address lines are shuffled.

PRG is identical to `Super Mario Bros. 4 (FDS Conversion)(Unl)[!]`, CHR differs in few bytes. And the difference is because of.. mario's outline:

Code: Select all

$8000-$9fff: [........] - write acknowledges IRQs, clears and stop counter

$a000-$bfff: [........] - write starts counter (clocked by CPU cycles).
                          After 4096 cycles (~36 scanlines) IRQ is generated
						  
$e000-$ffff: [.....PPP] - set prg bank

    $6000 $8000 $a000 $c000 $e000
     %110  %100  %101   PPP  %111
	 
Bus conflicts: no

[Ice Man]

I'm curious, since some of the address lines of PRG and CHR are shuffled and the mapper 40 repro you did does not do that.
Are there different mapper 40 ROMs or why is it done?

[krzysiobal]

If you desolder chip and dump using programmer, content will differ. If you dump them by kazzo-like thing following mapper 40 description, they will be the same. Reverse-enginering protection.
This characteristic soldermask notch, due to vias' proximity, is funny, never seen something that in any carts before.

[Ice Man]

Ah, I see. Thanks for clarification.
I have no idea why the via routing is so weird. They had enough space to keep the cart pins the same size for all of them.