The chip is a QFP (quad flat pack) with 48 pins
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(n) SOUND <- |01 48| - CHR A14 (r)
(r) CHR A13<- |02 47| - CHR A15 (r)
(r) CHR A12<- |03 46| -> CHR A16 (r)
(r) CHR A11<- |04 45| <- CHR A17 (r)
(s) CHR A10 -> |05 44| -> CHR A18 (r) (Not sure about this as it could be a special enable for CHR RAM instead, NC on my board)
GND - |06 43| -> +5v
(r) PRG A18 <- |07 42| -> CIRAM /CE(n)
(r) PRG A17 <- |08 41| -> CHRROM/CE(r)
(r) PRG A16 <- |09 40| <- WRAM /CE(w) (Megami Tensei II working fine with 6264 /CE connected to this pin)
(r) PRG A15 <- |10 39| <- /IRQ (n)
(r) PRG A14 <- |11 38| <- CHR A10 (n)
(r) PRG A13 <- |12 37| <- CHR A11 (n)
(s) PRG D7<-> |13 36| -> CHR A12 (n)
(s) PRG D6<-> |14 35| -> CHR A13 (n)
(s) PRG D5<-> |15 34| -> GND
(s) PRG D4<-> |16 33| -> GND
(s) PRG D3<-> |17 32| -> +5V (This is used to power the waveform RAM. Can be used as backup memory if connected to a battery)
(s) PRG D2<-> |18 31| - GND
(s) +5v - |19 30| -> M2 (n)
(s) PRG D1<-> |20 29| -> PRG R/W (s)
(s) PRG D0<-> |21 28| -> PRG /CE (n)
GND - |22 27| -> PRG A14 (n)
(r) PRG /CE -> |23 26| -> PRG A13 (n)
(s) PRG A11 -> |24 25| -> PRG A12 (s)
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This morning I got Megami Tensei 2 work with 8KB WRAM added.
Some signals were changed from (n) to (s)
This mapper not only can change mirroring on the fly, it also divides the CIRAM in two 1KB pages accessible through the mapping mechanism. That caused me a lot of confusion yesterday. So CHR A10 goes to both ROM and CIRAM A10.
An 4K7 pull-up resistor is required on M2 pin.
Sound should be added in series with a 10K load resistor or else there will be no sound output from C163 on the RCA jack:
Famicom slot pin46>10k resistor > C146 pin 1 > Pin 45
