Need help about frame counter

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wasdwdsa
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Joined: Sat Mar 26, 2022 2:01 am

Need help about frame counter

Post by wasdwdsa »

From NES APU frame counter wiki link:
The sequencer is clocked on every other CPU cycle, so 2 CPU cycles = 1 APU cycle. The sequencer keeps track of how many APU cycles have elapsed in total, and each step of the sequence will occur once that total has reached the indicated amount (with an additional delay of one CPU cycle for the quarter and half frame signals). Once the last step has executed, the count resets to 0 on the next APU cycle.
- Does it mean frame signals are only sent at APU phi-2?
After 3 or 4 CPU clock cycles*, the timer is reset.
If the mode flag is set, then both "quarter frame" and "half frame" signals are also generated.
* If the write occurs during an APU cycle, the effects occur 3 CPU cycles after the $4017 write cycle, and if the write occurs between APU cycles, the effects occurs 4 CPU cycles after the write cycle.
- Does the same latency apply to both resetting timer and sending frame signal?

If I trust the circuits diagram in visual2a03:
- frm_half/frm_quarter signals are always sent at APU phi-2.
- After write $4017, frm_half/frm_quarter signals are sent on APU phi-2, with 2~3 cycles latency. frm_t are reset on APU phi-1, i.e. with 3~4 cycles latency. They're not the same.

However, I failed to pass related test roms if follow these rules. And I found Mesen doesn't follow them.
Hope anyone can help to clarify what's correct behavior.

------------------------------------------------------------------------------------

The table below shows what I saw from Mesen’s Trace/Debugger/APU viewer when running test_2.nes of x0000's frame counter test rom.
sq0 length are counted down at CPU cycle 87735,87743,87753,87761,87771,87779,87789,102710,117626. Notice the last two are even cycles while others are odd cycles. This doesn't follow the behavior above.

And check its detail behavior:
- Writing 0x80 to 4017 seems update sq0 length counter after 3 or 4 cycles, always align to an odd cycle.
- Writing 0x00 to 4017 seems update sq0 length counter for the first time after 14917 cycles, at an even cycle. The 14917 cycles should be 4 cycles before reset timer plus 14913 cycles to reach half frame.

I also put the timing of my emulator in the same table. There’re two versions of my emu, both follow visual2a03, the only exception is power-up state: in ver.1 T1 of the 1st CPU instruction aligns to APU-phi1 and in ver.2 it aligns to APU-phi2. Version 1 fails test_2.nes, because sq0 len is counted down to zero before r4015. Version 2 passes but has side effect: the result of 4017_timing.nes becomes 10 instead of recommended 9.

Code: Select all

+-------+----+-----------+-----+---------+---------+---------+
|       |    |           |     | sq0 len | sq0 len | sq0 len |
| cycle | PC |   inst.   |[R]/W| (Mesen) | (my emu)| (my emu ver.2)|
+-------+----+-----------+-----+---------+---------+---------+
| 87720 |812F| STA $4003 |     |         |         |         |
| 87721 |    |           |     |         |         |         |
| 87722 |    |           |     |         |         |         |
| 87723 |    |           |  W  |         |         |         |
| 87724 |8132| LDA #$80  |     |   10    |   10    |   10    |
| 87725 |    |           |     |   10    |   10    |   10    |
| 87726 |8134| LDX #$07  |     |   10    |   10    |   10    |
| 87727 |    |           |     |   10    |   10    |   10    |
| 87728 |8136| STA $4017 |     |   10    |   10    |   10    |
| 87729 |    |           |     |   10    |   10    |   10    |
| 87730 |    |           |     |   10    |   10    |   10    |
| 87731 |    |           |  W  |   10    |   10    |   10    |
| 87732 |8139| DEX       |     |   10    |   10    |   10    |
| 87733 |    |           |     |   10    |    9    |   10    |
| 87734 |813A| BNE $8136 |     |   10    |    9    |    9    |
| 87735 |    |           |     |    9    |    9    |    9    |
| 87736 |    |           |     |    9    |    9    |    9    |
| 87737 |8136| STA $4017 |     |    9    |    9    |    9    |
| 87738 |    |           |     |    9    |    9    |    9    |
| 87739 |    |           |     |    9    |    9    |    9    |
| 87740 |    |           |  W  |    9    |    9    |    9    |
| 87741 |8139| DEX       |     |    9    |    9    |    9    |
| 87742 |    |           |     |    9    |    9    |    8    |
| 87743 |813A| BNE $8136 |     |    8    |    8    |    8    |
|  ...  |    |           |     |   ...   |   ...   |   ...   |
| 87753 |    |           |     |    7    |   ...   |   ...   |
|  ...  |    |           |     |   ...   |   ...   |   ...   |
| 87761 |    |           |     |    6    |   ...   |   ...   |
|  ...  |    |           |     |   ...   |   ...   |   ...   |
| 87771 |    |           |     |    5    |   ...   |   ...   |
|  ...  |    |           |     |   ...   |   ...   |   ...   |
| 87779 |    |           |     |    4    |   ...   |   ...   |
|  ...  |    |           |     |   ...   |   ...   |   ...   |
| 87782 |8136| STA $4017 |     |    4    |    4    |    4    |
| 87783 |    |           |     |    4    |    4    |    4    |
| 87784 |    |           |     |    4    |    4    |    4    |
| 87785 |    |           |  W  |    4    |    4    |    4    |
| 87786 |8139| DEX       |     |    4    |    4    |    4    |
| 87787 |    |           |     |    4    |    3    |    4    |
| 87788 |813A| BNE $8136 |     |    4    |    3    |    3    |
| 87789 |    |           |     |    3    |    3    |    3    |
| 87790 |    | STX $4017 |     |    3    |    3    |    3    |
| 87791 |    |           |     |    3    |    3    |    3    |
| 87792 |    |           |     |    3    |    3    |    3    |
| 87793 |    |           |  W  |    3    |    3    |    3    |
| 87794 |    | LDX #$38  |     |    3    |    3    |    3    |
| 87795 |    |           |     |    3    |    3    |    3    |
| 87796 |    | LDY #$18  |     |    3    |    3    |    3    |
| 87797 |    |           |     |    3    |    3    |    3    |
|  ...  |    |           |     |   ...   |   ...   |   ...   |
|  ...  |    |           |     |   ...   |   ...   |   ...   |
|102708 |    |           |     |    3    |    3    |    3    |
|102709 |    |           |     |    3    |    2    |    3    |
|102710 |    |           |     |    2    |    2    |    2    |
|  ...  |    |           |     |   ...   |   ...   |   ...   |
|  ...  |    |           |     |   ...   |   ...   |   ...   |
|117620 |    |           |     |    2    |    2    |    2    |
|117621 |814D| STA $4017 |     |    2    |    2    |    2    |
|117622 |    |           |     |    2    |    2    |    2    |
|117623 |    |           |     |    2    |    2    |    2    |
|117624 |    |           |  W  |    2    |    2    |    2    |
|117625 |8150| NOP       |     |    2    |    1    |    2    |
|117626 |    |           |     |    1    |    1    |    1    |
|117627 |8151| LDX #$FF  |     |    1    |    0    |    1    |
|117628 |    |           |     |    1    |    0    |    1    |
|117629 |8153| LDA $4015 |     |    1    |    0    |    1    |
|117630 |    |           |     |    1    |    0    |    1    |
|117631 |    |           |     |    1    |    0    |    1    |
|117632 |    |           |     |    1    |    0    |    1    |
+-------+----+-----------+-----+---------+---------+---------+
My tiny cycle-accurate NES emulator https://github.com/wasdwdsa/tiny_nes
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