Ziggy587 wrote: ↑Sat Nov 05, 2022 7:49 am
You'll have to read the datasheet for the SRAM
Ok, I took a look at the
datasheet, let's see if I got it right:
It talks about standby mode, not data retention, which should be different.
But it looks like I either should pull /CE1 high or CE2 low without caring about the other.
Ziggy587 wrote: ↑Sat Nov 05, 2022 7:49 am
You need a transistor so that CE2 can be high during normal operation but pulled low when the console is powered off. You need CE2 pulled low so the SRAM will enter its standby mode which draws the least amount of current.
Thank you. That's a very nice explanation, but doesn't the MAD chip already does something like that?
I'll try to find a 6264 board and check the CE2 pin, I think they should function more or less the same.
This table tells about the data retention current:
If I did get it correctly, the current should be 2μA which would give about 12 years, correct?
And this one talks about the stand-by mode current:
It's not clear to me what differentiates one mode from the other, maybe the Vcc voltage?
In this mode, the battery should last a lot less, as stated by Ziggy587.
Maybe adding 2 AA batteries to the cartridge should be a good idea?
But I think the best solution should be a FeRAM...
So thank you guys and please, help to correct me if I'm not getting everything correctly.
Thanks in advance.