Joypad buffer discussion

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krzysiobal
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Joypad buffer discussion

Post by krzysiobal »

Joypad buffer discussion

Joypad port connection in Famicom (and most chip based famiclones) is identical:

Code: Select all

            VCC
             |   _
            10k / |
    JOY CLK -+-o  |-- CPU M2
                \_|
                 o
                 |
                | \
      JOY D0 ---|  o-- CPU D0
                |_/
     /RD4016 ----o
Every time CPU reads from $4016, /RD4016 goes low for the whole duration of that cycle.
At the end of this cycle, CPU reads data bus then drives M2 to go low, which causes the
CLK line to go high and joypad shifts its next bit that can be read on next cycle.
The exact moment of rising and falling edge of /RD4016 in respect to edges od M2 is not
important, though if this line is decoded (internally) only basing on the CPU address bus, it should fall before rise of M2 and rise after fal of M2:

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               +---  CPU samples joypad 
               | +-  joypads shifts next bit
               | |
M2  ________/---\___
/RD4016 --\_______/-
JOY CLK -----\___/--
and it fact it is exactly like that:
scr.PNG

Now I am wondering, why M2 is used there instead of just VCC? The resulting logical effect would be identical and
additionally, M2 would not have load of those two 368 buffers and its edges could be more narrow:

Code: Select all

            VCC                                    
             |   _                                 
            10k / |                                
    JOY CLK -+-o  |-- VCC            M2  ________/---\____-
                \_|                  /RD4016 --\_______/---
                 o                   JOY CLK ---\_______/--
                 |
                | \                   
      JOY D0 ---|  o-- CPU D0
                |_/
     /RD4016 ----o
I started this discussion because I've just spotted a famiclone with even different wiring

Code: Select all

    JOY CLK --------- /RD4016
                 _
                | \
      JOY D0 ---|  o-- CPU D0
                |_/
     /RD4016 ----o
which still results in the same logical function, but here are a few drawbacks
* internal CPU pin is available at the joypad connector which might potentially destroy CPU if there is any ESD (while people
rarelly push/pull cartridges when console in turned on, they feel that doing the same with joypads is nothing wrong)
* when the joypad is somehow broken (has shorted CLK line),it might cause the buffer to be enabled permanently, causing bus conflicts and
not allowing to game to even boot.

I looked at the NES schematic and it is basically identical with exception of ESD protecting diodes on the JOY CLK line and a
series diode in the PAL version:

Code: Select all


             VCC
              |
             /_\
              | 
JOY CLK --|>----- /RD4016
              |
             /_\
              |
             GND

Now I am wondering about any advantages of the NES connection?
In NTSC NES (and the above famiclone) (without the series diode) the joypad could theoretically drive the CLK line low outside $4016 read cycle and
if the driving were strong enough, it could allow the joypad buffer to be enabled and thus allowing reading back joypad data for different address than $4016.
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lidnariq
Posts: 11432
Joined: Sun Apr 13, 2008 11:12 am

Re: Joypad buffer discussion

Post by lidnariq »

As far as advantages, I don't know, but this difference does cause a difference in the effects of DPCM DMA bit deletions when reading the controller. The NES-001 only deletes one bit; the HVC-001 deletes multiple.
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Individualised
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Re: Joypad buffer discussion

Post by Individualised »

lidnariq wrote: Fri Feb 10, 2023 11:50 am As far as advantages, I don't know, but this difference does cause a difference in the effects of DPCM DMA bit deletions when reading the controller. The NES-001 only deletes one bit; the HVC-001 deletes multiple.
Does this affect any methods to circumvent the DPCM controller bug?
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krzysiobal
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Re: Joypad buffer discussion

Post by krzysiobal »

lidnariq wrote: Fri Feb 10, 2023 11:50 am As far as advantages, I don't know, but this difference does cause a difference in the effects of DPCM DMA bit deletions when reading the controller. The NES-001 only deletes one bit; the HVC-001 deletes multiple.
Oh, I wondered how can it be and the only explanation would be that when DPCM DMA fetch occurs during $4016 read cycle, /RD$4016 remains low for the whole time until the second $4016 read cycle (except the DPCM fetch cyle) and yes,! it is exactly like that:
scr2.PNG

Code: Select all


M2       ____------______------______------______------______------______------______

/4016RD  ---____________________________________--------______________---------------

FC CLK   ----______------______------______------------------______------------------
                 ^---------^------------^----------- three bits were deleted

NES CLK  ---____________________________________--------______________---------------
                       ^---- only one bit is deleted
Anyway, replacing the M2 with VCC in 74368 would still make it behave like NES (single bit lost during DPCM).

BTW. I lost today 2 hours on finding out why this famiclone crashes (and then won't boot up) when I plug in my joypad. After changing the circuit from NES-like to the famicom-like it stopped crashing but still joypad was not working properly (behaving like crazy). Measurement on the CLK line showed significant drop of voltage from 5V to 2.5V after joypad was plugged. This was my home-made joypad based on atmega8 (but it works fine on different consoles).
But other epoxy-blob joypads worked fine. THen I found out this console has rather non-standard joypad pinout

Code: Select all

   D S C
 o o o o o              
  o o o o
    | +---- GND
    +------ VCC
instead of expected:

Code: Select all

   D S C
 o o o o o              
  o o o o
  |   +---- GND
  +-------- VCC
so the joypad was not getting any supply voltage. Weirdly, the epoxy-blob joypads could suck the voltage through data lines, so basically my joypad without supply voltage was causing drop on the clock line that lead to enabling the buffer outside $4016 cycles.

To avoid this, they could at least route the RD /4016 to joypad CLK through one of the unused 74368 gates.
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lidnariq
Posts: 11432
Joined: Sun Apr 13, 2008 11:12 am

Re: Joypad buffer discussion

Post by lidnariq »

Individualised wrote: Fri Feb 10, 2023 1:02 pm Does this affect any methods to circumvent the DPCM controller bug?
No - those all rely on preventing or detecting the bit deletion in the first place.
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