KJ01A-18 MMC3 flash multicart PCB / mapper 473

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Mutabor
Posts: 15
Joined: Sun May 07, 2023 1:19 am

KJ01A-18 MMC3 flash multicart PCB / mapper 473

Post by Mutabor »

KJ01A-18 PCB

Mapper: NES 2.0 Mapper 473 MMC3, NROM modes
3.3V power source: mapper or D3
ReWriteable: yes
PRG: Up to 32MB flash
CHR: Up to 256KB RAM or flash
PRG RAM: U4, no battery

Note:
- This PCB looks similiar to SMD168L6 PCB (mapper SMD133);
- Used in chinese cartridge "600in1 CLASSIC", F/W CLASSIC 600 IN 1 8B3179ic6023.

Mapper registers:

Reg base = 0x4800

R0.0..2 P: PRG SIZE = 16k*2^P (P=0 size=16k, P=7 size=2m)
R0.5 0 - startup mode, PRG bank fixed to 0x3f; 1 - normal mode
R0.6 lock MMC3 registers
R0.7 0 - NROM8K mode; 1 - MMC3 mode

R1 PRG A13..20

R2.0..3 PRG A21..24

R3.0..4 CHR A13..A17 for NROM8K mode

MMC3 RA001.6 disable flash write

Note:
- Ext registers does not have a lock bit for themself, but can lock MMC3 registers;
- Mapper does not have a dedicated NROM16K/NROM32K modes, but this modes can be emulated via MMC3 registers;
- Mapper start in NROM8K mode with fixed bank 0x3f, (0x7E000 offset in dump), and can be switched to MMC3-512K mode directly from code in region 0xE000-0xFFFF.
Attachments
kj01a-18_top.jpg
kj01a-18_bot.jpg
mapper473_pinout.txt
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Mutabor
Posts: 15
Joined: Sun May 07, 2023 1:19 am

Re: KJ01A-18 MMC3 flash multicart PCB / mapper 473

Post by Mutabor »

Seems there is incorrect PRG RAM CE(PRCE) signal logic:
kj01_prce.png
With PRG RAM, this cartridge halts just after PRG RAM activation via MMC3 RA001.
PRCE signal becomes active just when ROMSEL is high, regardless of M2, producing bus conflicts. This conflicts is visible even on video:
kj01_pr_vs_nopr.png
kj01_pr_vs_nopr.png (16.46 KiB) Viewed 1672 times
User avatar
aquasnake
Posts: 515
Joined: Fri Sep 13, 2019 11:22 pm

Re: KJ01A-18 MMC3 flash multicart PCB / mapper 473

Post by aquasnake »

WRAM is read-writable, only after $4800 being set with $AX(recommended but not necessary, just an indication of the end of the menu loader) and $A001 being set with $80

It seems that on the diagram:
WRAM_EN = ROMSEL & A14 & A13;

Expectations should be:
WRAM_EN = M2 & ROMSEL & A14 & A13;

Perhaps this blob is damaged or a defective design, and can only be used as a game without WRAM.
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