Famicom Disk System emulation

[paulb_nl]

If it is resetting to all 1s and reloading to 3245 after 128 refreshes then it is impossible that it is incrementing instead of decrementing.

We know because of your tests that the behavior is that it counts 3246 cycles to trigger an IRQ after 128 refreshes so either SCSR is reading the bits wrong or the counter is decrementing.

[TakuikaNinja]

I inserted 2 NOPs after the re-enable write and it does reduce the measured count by the expected amount. I'm inclined to agree that it can't be incrementing from the all 1s state, otherwise I would've gotten an IRQ immediately after re-enabling the watchdog.