SuperFX GSU-1/GSU-2 pinout

[magno]

I want to make (some day in the future) a hardware version of SuperFX chip developed on a FPGA. To achieve this, I gathered as much information about it as I could (most of it from SNES developers book), but couldn't find the pinout, neither for GSU-1 nor for GSU-2.

I used my multimeter to match each pin on the StuntRace FX cartridge's edge with each pin of SuperFX, and finally I completed the pinout (I hope I will have spare time to do a schematic in order to post it). I discovered some weird thing: pin 31 of LH538 Mask-ROM was grounded!! If the LH538 datasheet I have is the right one, that pin is A18; LH538 is a 1Mx8 mask-ROM, so... how comes that ROM file is 1MByte, mask-ROM is 1Mbyte but A18 is grounded (19 address pins are used -> 512Kbytes addresseables)??
Maybe my datasheet is wrong?
Where may I find LH538 and LH537 datasheets? I couldn't find the latter anywhere. It is the mask-ROM used on Yoshi's Island (2Mx8).

[magno]

Could somebody check if this is right?



All this is result of my guessing about the function of each pin, so maybe there is something wrong.

Anyway, I am still confused about my first question:
why ROM A18 grounded on StuntRaceFX cartridge?
It can be seen with the naked eye on this PCB photo:

http://www.snescentral.com/0/0/5/0059/S ... ront-1.jpg

[shadowkn55]

Nintendo uses maskroms that don't have JEDEC pinouts. Several pins are swapped.

Pin 1 - A17
Pin 2 - A18
Pin 24 - A16
Pin 30 - A19
Pin 31 - /OE (GND for GSU-1 boards)

[magno]

Nintendo uses maskroms that don't have JEDEC pinouts. Several pins are swapped.

Pin 1 - A17
Pin 2 - A18
Pin 24 - A16
Pin 30 - A19
Pin 31 - /OE (GND for GSU-1 boards)

That's just what I was looking for THANKS!!

Is there any datasheet or maybe you gueesed that?

[phazmatis]

http://www.caitsith2.com/snes/flashcart ... nouts.html

[magno]

http://www.caitsith2.com/snes/flashcart ... nouts.html

I have that information since some years ago, but I always thought it was referring to DIP Mask-EPROMs. LH538 isn't and furthermore, it has its own datasheet (manufactured by Sharp), so I took it as valid, but obviously it wasn't

Thanks!

[phazmatis]

Hmm... that number sounds familiar...

Ah yes, gameboy ROMs: http://www.reinerziegler.de/lh538.gif

[magno]

Hmm... that number sounds familiar...

Ah yes, gameboy ROMs: http://www.reinerziegler.de/lh538.gif

That is the wrong pinout I was using... for some strange reason, the part number is the same than GB ROMs, but it hasn't the same pinout: if it were right, then A18 would be grounded, so StuntRaceFX would be 512Kbytes, not 1M.

shadowkn55 was right: those pins are swapped, so the correct pinout is the one in http://www.caitsith2.com/snes/flashcart ... nouts.html.

I should correct the GSU-1 pinout...

[magno]

Ok, i updated the pinout and it makes a lot more sense now!! Address bus is contiguous, but there's no chip enable, chip select or output enable signal from GSU-1 to ROM: the ROM is always enabled, and is the GSU that selects which data is to appear in the SNES bus: from SRAM, from ROM or from internal registers...

Thanks for your help!!

[shadowkn55]

GSU-2 maskroms also follow the standard 36 pin diagram. A21 and A22 are grounded since GSU-2 only supports up to 16mbit. The /CE and /OE signals aren't tied to ground either, they connect directly to the chip.

[magno]

GSU-2 maskroms also follow the standard 36 pin diagram. A21 and A22 are grounded since GSU-2 only supports up to 16mbit. The /CE and /OE signals aren't tied to ground either, they connect directly to the chip.

Yoshi's Island's maskrom has 40 pins, and it is a GSU-2 cartridge...

[shadowkn55]

You're right. I forgot about that. This should have the correct pin out. It's the one on the bottom.

http://nintendoallstars.w.interia.pl/ro ... esroms.htm

[magno]

You're right. I forgot about that. This should have the correct pin out. It's the one on the bottom.

http://nintendoallstars.w.interia.pl/ro ... esroms.htm

Thanks! I have just finished doing the pinout over the PCB and I figured out it was that way. MROM /OE is grounded too but /CE is connected to GSU-2 as you said.

I will begin now to create the OrCAD schematic and will post it here for anybody who may want it.

[magno]

Sorry to refloat this old thread, but I think it is interesting to put all SuperFX related info together.

I'm making my own EagleCAD library SuperFX device and I'm trying to guess all pin functions. This schematics (done by hand) it's the first approaching to the design:





As you can see, almost all pins are labelled with the proper function, but I have some doubts:

* There aren't any SuperFX board with two mask ROMs, is there? So I guess there is no need for two different pins for /ROM_LO and /ROM_HI like in the MAD-1. But don't you think probably Nintendo ingenieers would have foreseen this situation? It looks like pin 21 in GSU-2 is a great candidate for this.

* SRAM chips are always selected on SuperFX boards; I mean, /CE is always low except for stand-by mode (when in data retention mode). This is achieved by MM1026AF chip but SuperFX was designed to use onboard RAM, which was not battery backed-up in all cases. This makes me think that there should be some pin dedicated to /SRAM_CE and the best candidate is GSU2's pin 106. Could somebody who onws a Doom cartridge please check this?

[nocash]

Did you draw the schematics with EagleCAD? No, just joking, they are looking great! Better than many CAD based schematics that I've seen!
What are the X1 frequencies? For GSU-1, I think, it should be 21.4Mhz. And GSU-2, the same? Or is externally doubled?