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Re: Legible SNES Schematics
Posted: Mon Dec 11, 2017 7:01 pm
by creaothceann
Wikipedia says the
Super FX can upload graphics from the cartridge to VRAM. Shouldn't therefore the PA lines on the connector be bidirectional?
Re: Legible SNES Schematics
Posted: Mon Dec 11, 2017 7:04 pm
by lidnariq
There is only one bus master in the SNES, and that's the S-CPU and its DMA unit. The SFX is not what's doing the uploading.
Re: Legible SNES Schematics
Posted: Wed Dec 13, 2017 2:48 pm
by SeƱor Ventura
I always believed that DMA can transfer tiles directly from the rom to the vram... and with an sfx we still have the dma doing the same job.
The SFX don't do anything in that way.
Re: Legible SNES Schematics
Posted: Wed Dec 13, 2017 5:21 pm
by tepples
It can.
DMA transfers data from one bus to the other. ROM and cart RAM are on bus A, and the PPU's VRAM data port is on bus B. The console's WRAM is on bus A or bus B (but not both at once). DMA from cart RAM to WRAM pauses the 65816, and I think the GSU is paused as well.
Re: Legible SNES Schematics
Posted: Sun Dec 31, 2017 8:00 pm
by Firebrandx
OP's link is broken. Anyone have a mirror link?
Re: Legible SNES Schematics
Posted: Mon Jan 01, 2018 11:05 am
by sanni
Not sure if it's the most recent version
Re: Legible SNES Schematics
Posted: Mon Jan 01, 2018 11:09 pm
by whicker
Re: Legible SNES Schematics
Posted: Mon Jan 01, 2018 11:56 pm
by lidnariq
Here's the last version of snes_schematic_color I have, four minor revisions newer than what sanni posted-
Re: Legible SNES Schematics
Posted: Tue Jan 02, 2018 12:29 am
by Firebrandx
If you click on that link you posted, you'll see all the schematic file links are broken.
