APU and Interrupt Flag

[Anes]

Im confused how the "frame interrupt" and the "irq disable" flag work.
Plase tell me if what i do is right or wrong, or something is bad:

- the frame interrupt is set on tick 4 of mode 0 (4 step)
- when it's set it is a condition to trigger the IRQ always if "irq disable" is clear:

Code: Select all

    if (frame_interrupt && irq_disable == 0)
        IrqPending()

- 1) According to Blargg's APU doc at "any time" the "interrupt_flag == 1" is set and "irq_disable == 0" set "IrqPending()". Does it mean that i have to check constantly this to trigger the IRQ or ->
2) The wiki says that i have to trigger at tick 4 of mode 0 if those 2 conditions are true;
- 4015 Read returns the in its byte ored 0x40 if "interrupt flag" is set.
- 4015 Read acknowladge an IRQ after the status is read.

Code: Select all

unsiged short ReadApu(addr)
switch (addr)
{
data = 0;
    case 4015:
         //len counter and DMC bytes remeaining...
     if (frame_interrupt)
        data |= 0x40;
        break;
...
}
return data;

Anyway, im suffering Error #7 in APU IRQ test Blarrg's rom.