According to that Sony datasheet, the SPC700 series have up to 4 external interrupt sources and 19 internal sources, with 15 vectors (so some of the sources must share vectors). The block diagram on page 13 (page 14 of the PDF) shows NMI, INT0, INT1 and INT2 pins going into the interrupt controller block, along with inputs from the timers, serial ports, and just about every other peripheral block on the chip. The controller presumably handles masking and priority between all 20-odd sources and determines a vector based on the highest-priority source. In other words, interrupts are nothing at all like a 6502, they're vastly more sophisticated and more like, well, a microcontroller.
Interrupts are pretty much the first thing you redesign when turning a CPU into a MCU. Compare interrupts on the NEC V25/V35 to a standard x86, the architecture they're based on. Or compare the Game Boy CPU, the Z80, and the i8085 to the i8080, which all three are based on. Interrupts are totally different on each of them (although the Z80 and 8085 both support the 8080 interrupt model for backwards compatibility).
Most likely Sony removed the interrupt controller completely from the S-SMP to bring down the transistor count. If there was an interrupt controller on the thing, you'd figure they'd at least hook the timers up to it rather than force you to poll them.
SPC-700 Test ROMs should be in SPC format: Rationale
Moderator: Moderators
Forum rules
- For making cartridges of your Super NES games, see Reproduction.
Re: SPC-700 Test ROMs should be in SPC format: Rationale
Really, the Break Instuction shared the same vector as TCall 0, with the diffference that you had to use RTI rather than RET to return. I bet all the other interrupts shared vectors with the TCall instructions, on the processors that supported these interrupts. Really wish they would have at least kept IO port interrupts and timer interrupts, as I am sure the processor could have been that much more powerful with these interrupts.