65816 SEP: be careful

[bazz]

if you are using 16 bit index registers, and u sep them, do something, then rep them back.. well high 8 bits are gone by then!! cleared to zero! Sayonara!

[mic_]

Well, that's mentioned in chapter 4 of WDC's "Programming the 65816":

While the index registers are shown as sixteen-bit registers, they may be set, as a pair, to be either sixteen-bit registers or eight-bit registers – their high bytes are zeroed when they are set to eight-bits.

[bazz]

I know, but we can't all be smart ^_^

[koitsu]

I don't remember this being the case back in the day, and therefore believe WDC's documentation may be wrong here. I just tested on an Apple IIGS emulator (I can break out real hardware if you want -- I've done it before) and the upper 8 bits remain intact after the sep. Code used to test (started at memory offset $B000):

Code: Select all

  clc
  xce
  rep #$30
  lda #$beef
  sep #$30
  brk $ff

Result once the brk hits (on the IIGS the built-in monitor will give you a full register dump):

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00/B009: 00 FF
 A=BEEF X=0000 Y=0000 S=0134 D=0000 P=B0
 B=00 K=00 M=0C Q=88 L=1 m=1 x=1 e=0

You can clearly see here that m=1 and x=1 (meaning 8-bit accumulator and 8-bit indexes), but A contains $BEEF, not $00EF.

I've attached screenshots proving the case (note I had to issue m=0 prior to ensure the disassembly showed up correct, given use of the 16-bit lda).

[tepples]

You tried this in ActiveGS, not an Apple IIGS. It's like testing in NESticle. Should I dig out my GS, try it, and take my own screenshot?

Besides, X and Y behave differently from A in this respect. SEP #$10 clears bits 15-8 of X and Y, while SEP #$20 splits A into A and B.

[KungFuFurby]

How about testing that value for X and Y registers, too when switching between 8 and 16 bits? I do know that the accumulator is intact when dealing with this situation, although only 8 bits at a time. The index registers, to my knowledge, do not have this luxury.

[bazz]

AH that's because you are working on the accumulator. I guess I'll make test app too..

[bazz]

W00tz, we learned stuffz today
good lucking reading my picture.

[koitsu]

You tried this in ActiveGS, not an Apple IIGS. It's like testing in NESticle. Should I dig out my GS, try it, and take my own screenshot?

Besides, X and Y behave differently from A in this respect. SEP #$10 clears bits 15-8 of X and Y, while SEP #$20 splits A into A and B.

I missed the key part of bazz's post where he said INDEX REGISTERS. I read it as just "registers", and focused on accumulator. Yes, the upper bits of X/Y will be lost when moving from 16-->8.

And ActiveGS behaves CPU-wise the same as a IIGS (specifically relevant to this test case; timing-wise there may be other complications), and I put a lot of faith into it given that the guy who maintains it is Olivier Goguel of FTA. You've already seen my video where I pulled out my IIGS for testing anyway (mine still sits here). :P