Wiki PPU register formatting
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Wiki PPU register formatting
I'd like to ask for folks' opinion of having the PPU registers "table-ised". I recently saw this formatting being used in the APU Frame Counter page and found it a lot easier to understand/visualise, plus it's a bit more compact.
Proposed new: http://wiki.nesdev.com/w/index.php/User ... _.3E_write
Old: http://wiki.nesdev.com/w/index.php/User ... 3E_write_2
I don't want to change anything unless the majority of folks like the change. I can make this into a poll if that'd be preferred.
Proposed new: http://wiki.nesdev.com/w/index.php/User ... _.3E_write
Old: http://wiki.nesdev.com/w/index.php/User ... 3E_write_2
I don't want to change anything unless the majority of folks like the change. I can make this into a poll if that'd be preferred.
Re: Wiki PPU register formatting
My old style was an imitation of Firebug's mapper document, for what it's worth.
Re: Wiki PPU register formatting
*nod* It's fine tepples, it's just that we should be consistent with our register formatting.
I happen to like the table-ised version more -- but as I got bit by the syntax highlighter incident, I'm not going to spend the time mass-modifying things only to have to revert it all later, so I'm asking in advance. :-)
I happen to like the table-ised version more -- but as I got bit by the syntax highlighter incident, I'm not going to spend the time mass-modifying things only to have to revert it all later, so I'm asking in advance. :-)
Re: Wiki PPU register formatting
I personally prefer preformatted text. It copies and pastes easier and it's easier to edit. I'm not a fan of the lines drawn using pipes, plus signs, and dashes, but I find something like this both easier to read and easier to work with.
Or something like this.
Code: Select all
Bit Function
--- ----------
0/1 Base nametable address
(0 = $2000; 1 = $2400; 2 = $2800; 3 = $2C00)
2 VRAM address increment per CPU read/write of PPUDATA
(0: add 1, going across; 1: add 32, going down)
3 Sprite pattern table address for 8x8 sprites
(0: $0000; 1: $1000; ignored in 8x16 mode)
4 Background pattern table address (0: $0000; 1: $1000)
5 Sprite size (0: 8x8; 1: 8x16)
6 PPU master/slave select
(0: read backdrop from EXT pins; 1: output color on EXT pins)
7 Generate an NMI at the start of the vertical blanking interval (0: off; 1: on)
Last edited by snarfblam on Sat Feb 14, 2015 3:43 pm, edited 1 time in total.
Re: Wiki PPU register formatting
Can I ask why you'd be copy-pasting stuff from the wiki to begin with? This sounds like an edge use case for something uncommon.
Also, bits are usually defined/documented in order of MSB to LSB (i.e. bit 7, bit 6, bit 5... bit 0). That's a pretty much "universal norm" in technical documentation. It all stems from most things being done left-to-right, and because of how "bit math" works (%00 = 0, %01 = 1, %10 = 2, %11 = 3, etc.) -- reversing that order isn't how computers work. Maybe Hebrew documentation is different? Dunno.
Also, bits are usually defined/documented in order of MSB to LSB (i.e. bit 7, bit 6, bit 5... bit 0). That's a pretty much "universal norm" in technical documentation. It all stems from most things being done left-to-right, and because of how "bit math" works (%00 = 0, %01 = 1, %10 = 2, %11 = 3, etc.) -- reversing that order isn't how computers work. Maybe Hebrew documentation is different? Dunno.
Re: Wiki PPU register formatting
Wat?snarfblam wrote:preformatted text [... is] easier to edit
My personal favorite layout is Microchip's documentation of internal registers. But it's optimized for print, not a wiki, so I'm not certain how applicable it is.
Re: Wiki PPU register formatting
Doesn't have to be the primary consideration, just a bonus with preformatted text. I'm also not particularly concerned about whether bits are listed greatest to least of vice-verse. That's not the point I was getting at.koitsu wrote:Can I ask why you'd be copy-pasting stuff from the wiki to begin with? This sounds like an edge use case for something uncommon.
Text editor? Simple to use? No?lidnariq wrote:Wat?
Re: Wiki PPU register formatting
Was x86 invented by hebrew speakers? How about VAX? What a ludicrous strawman. There are technical reasons for serial protocols to be little endian ... or big endian ... and that has nothing to do with the printed representation.tepples wrote:I don't know. Was the UART, which transmits LSB first, invented by Hebrew speakers? Were Hebrew speakers behind USB, which also transmits LSB first?
Re: Wiki PPU register formatting
If I only had a brain...
I guess the choice of explaining LSB first or explaining MSB first could depend on whether the LSB value controls the interpretation of MSB or the MSB value controls the interpretation of LSB.
Re: Wiki PPU register formatting
Okay so now that the thread has gotten completely off-topic in the matter of like an hour, can we please re-focus on what I originally asked? :P All I've got so far is one person saying they'd prefer the preformatted/plaintext version.
Re: Wiki PPU register formatting
I prefer the proposed new format.
EDIT: I guess I'll add a short description about "why": It's easier to connect a description to the corresponding bit (the bit number and its mask) in a single glance. YMMV.
EDIT: I guess I'll add a short description about "why": It's easier to connect a description to the corresponding bit (the bit number and its mask) in a single glance. YMMV.
Last edited by thefox on Sat Feb 14, 2015 5:31 pm, edited 2 times in total.
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Re: Wiki PPU register formatting
I just asked in #nesdev on EFnet, and Lord_Nigh told me he prefers "Old"
http://git.redump.net/mame/tree/src/mess/drivers/cat.c
Scroll down around lines 717, 784, 843, 862
EDIT: More from #nesdev
<Movax21> I think the first is slightly easier to read. I don't hate the old one, but I think the new one is slightly better.
<Ulfalizer> i think i like the old one better. less spammy. might just be that i'm more used to it though. less line-following anyway
http://git.redump.net/mame/tree/src/mess/drivers/cat.c
Scroll down around lines 717, 784, 843, 862
EDIT: More from #nesdev
<Movax21> I think the first is slightly easier to read. I don't hate the old one, but I think the new one is slightly better.
<Ulfalizer> i think i like the old one better. less spammy. might just be that i'm more used to it though. less line-following anyway
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Re: Wiki PPU register formatting
I prefer the old way, but mostly just because it's more consistent with most of the mapper pages. Frame counter is an oddball.
I do like labelling the various bits with letters though. Consider an alternative that's used on a lot of the mapper pages: http://wiki.nesdev.com/w/index.php/VRC6_audio
What I dislike most about the tables is all the lines between rows, and I just find the labelling of the rows a bit ugly, I suppose.
I think the PPU registers page could use a summary table like the main APU page. Maybe I'll add one now...
I do like labelling the various bits with letters though. Consider an alternative that's used on a lot of the mapper pages: http://wiki.nesdev.com/w/index.php/VRC6_audio
What I dislike most about the tables is all the lines between rows, and I just find the labelling of the rows a bit ugly, I suppose.
I think the PPU registers page could use a summary table like the main APU page. Maybe I'll add one now...
Re: Wiki PPU register formatting
I slightly prefer the new way, but I don't care much.
Since I had vouched for the "microchip style", I've mocked something up on the wiki. Caveat: I don't think it's a good match, because (among other things) it's big, it requires coming up with a name for every single bit, and large portions are redundant on the NES in ways that they aren't on PICs.
Since I had vouched for the "microchip style", I've mocked something up on the wiki. Caveat: I don't think it's a good match, because (among other things) it's big, it requires coming up with a name for every single bit, and large portions are redundant on the NES in ways that they aren't on PICs.