Help! (Wierd Stuff When Slowdown Occurs) (Solved)

[Khaz]

From (preposition) \ˈfrəm, ˈfräm also fəm\

—used to indicate the starting point of a physical movement or action

In all seriousness though... What I mean is that, you're building a ROM here, not a RAM. You can't just "code" a table into RAM, you have to store it in your ROM and then put it there manually. So even if your table is going to end up in WRAM, it still has to fit in ROM, and that means if it's bigger than $8000 it has to be broken up.

[tepples]

from prep.

1. With the source or provenance of or at.
   "This wine comes from France."
   "I got a letter from my brother."
2. With the origin, starting point or initial reference of or at.
   "He had books piled from floor to ceiling."
   "He left yesterday from Chicago."
   "Face away from the wall!"
3. With the separation, exclusion or differentiation of.
   "An umbrella protects from the sun."
   "He knows right from wrong."

BSS is for RAM that's assumed to be zeroed. It's not for things in ROM that get copied to RAM during program startup; that's what DATA segments are for.

[Khaz]

BSS is for RAM that's assumed to be zeroed. It's not for things in ROM that get copied to RAM during program startup; that's what DATA segments are for.

Oh, okay, nevermind... I guess you ARE building a RAM.

[Drew Sebastino]

Oh, okay, nevermind... I guess you ARE building a RAM.

Don't worry, I'm not that stupid.

Anyway though, why isn't the BSS section the full 128 Kilobytes?

[Khaz]

I think whatever is not explicitly specified there is just assumed to be zero like tepples said.

How does that "BSS" even work? Does the assembler inject code to copy the segment to WRAM into the ROM, or...?

EDIT: Nevermind I guess that's what "DATA" is, but then... I'm confusing myself.

[tepples]

$0000-$1FFF has more instructions and addressing modes capable of accessing it than $7E2000-$7FFFFF. You can use low memory as direct page or as stack, and in LoROM, you can use it while B (data bank register) is set to any bank $00-$3F or $80-$BF.

If you're using target-specific init code included with cc65, the linker inserts init code that (among other things) initializes the hardware, zeroes the BSS segment, copies the DATA segment from its load address to its run address, and then does jmp main. Currently cc65 does not include init code suitable for Super NES. But the mechanism of load and run addresses can also be used to send the SPC700 image to the IPL, as my Super NES project template demonstrates.

[UnDisbeliever]

Anyway though, why isn't the BSS section the full 128 Kilobytes?

The 65816 preforms its addressing in 64KiB banks. The DB (Data Bank) register holds the address for the bank that is used by the Absolute addressing modes. To access data outside the current bank you need to either change the DB register or use long addressing[1].

If a segment could cross into another bank, ca65 (and WLA for that matter) will not be able to tell if a variable is accessed with absolute or long addressing at assemble time.

According to your lorom256k.cfg file, the BSS segment covers WRAM addresses $00:0200 - $00-1FFFF. Within the file the two segments BSS7E ($7E:2000 - $7E:FFFF) and BSS7F ($7F:FFFF - $7F:FFFF) handle the other 120KiB of WRAM in the SNES.


Now to complicate matters:

ca65 does not know if a variable should be accessed with absolute (2 bytes) or long (3 bytes) addressing modes. This is because the assembler does not know the memory layout or the state DB register.

When your allocating memory in a databank that is not DB you have you have to give it the appropriate hint to use long addressing.

Code: Select all

.segment "BSS7E" : far
	varVariable:	.byte

and when your importing it into another file:

Code: Select all

.import farVariable: far

As I explained in a previous thread about zeropage addressing. If you modify DB to $7E/$7F, you need to tell the assembler to use absolute addressing with the a: modifier.


Sorry for not being on the forums this past fortnight, real life got in the way.

-----
EDIT: I went through your code and noticed another potential issue that might bite you in the future.

Your VBlank routine does not save bits 8-15 (upper 8 bits) of A, X, Y if they are in 8 bit mode.

Some code that I have written uses bits 8-15 of A as a temporary place-holder that is accessed via the XBA instruction. If VBlank occurs during a routine that uses this method, it will break your code.

The more correct method of saving system state for an interrupt is:

Code: Select all

VBlank:
	; Save state
	REP #$30
.A16
.I16
	PHA
	PHB
	PHD
	PHX
	PHY

	PHK
	PLB

	LDA	#0
	TCD

	; DB=0, DP =0
	; code goes here.

	; Load State
	REP	#$30
	PLY
	PLX
	PLD
	PLB
	PLA

	RTI

Saving the Status register is unneeded because the 65816 will push it to stack on interrupt and restore it with the RTI.

---
[1] Long addressing is only available for ADD, AND, CMP, EOR, LDA, ORA, SBC, STA instructions, and can only be indexed via the X index register.

[Sik]

BSS is for RAM that's assumed to be zeroed.

I thought BSS was for RAM that wasn't initialized =S (i.e. you don't care about the initial value, although some platforms do indeed fill it with zeroes on start)

[tepples]

The ld65 linker was originally created to support an implementation of the C language, which specifies that statically allocated variables without an explicit initializer shall be zeroed. Statically allocated variables include file-scope variables and static variables inside a function. The init code used with C programs zeroes an area of memory defined by the __BSS_RUN__ and __BSS_SIZE__ symbols that ld65 creates when define=yes is defined on the segment BSS.

C or no C, the convention is to use the term BSS for the segment containing uninitialized statically allocated variables. This originated in a mid-1950s assembler for IBM 704 that used BSS for "block started by symbol", roughly equivalent to .res in ca65. Author Peter van der Linden explains its modern meaning as "better save space". In any case, the segment naming convention is that DATA is for explicitly initialized objects and BSS is not.