Game Genie tracing/diagramming

[Myask]

I've been tracing the Game Genie board (black version) from bootgod's site to see how things connect up. I'm partway done, but it isn't fully-doable because the images are too low-res and also still have the chips in the way. Later this/next week I'll pop open a gold one and take some pictures. I've seen another PCB pic by searching, of a different revision, but no depopulated ones. (Prima facie most of it's the same but less rigidly angled; there's an extra diode...)

One thing that struck me as odd is that the Genie IC doesn't seem to intercept (that is, have different pins for the cart-side and console-side) the CPU data lines, but just connects through a resistor to them. Also that it has some connection to EXP8, though I know not where.

Current findings:
Passed through untouched: /IRQ, EXP0-7,EXP9, PPU/WR, CIRAM /CE, CIRAM A10, all four CIC pins
(Those last six are, of course, each reasons the Game Genie cannot operate solo.)
Passed through, with side-connection(s): CPUA*, CPUD*, CPUR/W, EXP8, PPU /RD, PPUD*
Intercepted: /ROMSEL

yet-to-finish-tracing: GND, SYSCLK, M2, +5V, PPUA*, PPU/A13

I've got a couple questions, some of them for avoiding duplicating work.

• How's that work? Does it disable (cartside) /ROMSEL when it realizes it needs to patch after seeing CPUA (and sometimes D), then assert its own? (less important)
• Has someone here already diagrammed the(/a) Game Genie cart?
• Does anyone have images of a depopulated Game Genie corresponding to [url=bootgod.dyndns.org:7777/imagegen.php?ImageID=6848&width=700]this[/url] handy?
• I've noticed a couple of people (Memblers, Blargg) have done mods of their Genies to put in different ROMs. The IMP R1-B001 chip used here is rather hard to find information on, at least in English. (If what I read is correct, they're still available for 1¢/!) To avoid duplicating work...does anyone know the pinout of the R1-B001? (pins 13-17 are d3-7)
  • And does socket+ROM fit under the case?
• Or the pinout of the Genie IC?

(e: yes, I have them layered so things are easily revisable. Layers are awesome. But GIMP xcfs are not on the approved list.)

[tepples]

Interesting. The use of resistors opens up another method that games could have used for Genie detection: open bus testing.

Feel free to post your xcf.zip.

[Myask]

Oh, right. Easier to just look at PNGs, though.

(sidenote: bootgod's site doesn't give its highest-resolution images by default.)

[Memblers]

It doesn't help with the board, but the images in the patent are really interesting.
http://www.google.com/patents/USRE35520

One thing that struck me as odd is that the Genie IC doesn't seem to intercept (that is, have different pins for the cart-side and console-side) the CPU data lines, but just connects through a resistor to them. Also that it has some connection to EXP8, though I know not where.

Since the codes only apply to $8000-$FFFF, it can leave /ROMSEL inactive when it needs to take over the data bus. That's really interesting that it uses an EXP pin, I didn't notice that. I've bought well over a dozen Game Genies because of the project I'm working on, and it's amazing how many board variations there are. Some of the layouts are quite different.

The other chip on the board is a maskROM with a standard 2732 pinout, I'm using 27C32 but I've also used 27C256 by making an adapter out of 2 DIP sockets. And no, with a socket it doesn't fit back into the case. I'm doing my testing on a front-loader modified to be a top-loader. It's possible to run a bare PCB on a front-loader, usually you have to add some weight to the board, though.

I could desolder one tomorrow and get an image of it soon, now I want to know what that EXP pin does.

edit: Here is the Game Genie chip pinout from the NES Cart Types doc by kevtris. http://kevtris.org/nes/nestuff2.txt

Code: Select all

Galoob's Game Genie
-------------------

This intresting little device plugs between an NES cart and the
NES unit itsself.  It's fairly simple inside- consisting only of
a 48-pin chip simply marked 'Galoob' and a 24-pin ROM marked 'Genie V1.5'
along with some passives.

                                  
                                  .----\/----.
                                  |          |
                     CC PRG /CE - |01      48| - CHR /A13 on NES
                  Genie ROM /CE - |02      47| - CHR /A13 on CC
                    NES PRG /CE - |03      46| - CHR /RD
                        PRG R/W - |04      45| - CHR  A2
                        PRG  A0 - |05      44| - CHR  A4
                        PRG  A1 - |06      43| - CHR  A5
                        PRG  A2 - |07      42| - CHR  A6
                        PRG  A3 - |08      41| - CHR  A7
                        PRG  A4 - |09      40| - PRG  D0
                        PRG  A5 - |10      39| - PRG  D1
                        PRG  A6 - |11      38| - PRG  D2
                            GND - |12      37| - PRG  D3
                        PRG  A7 - |13      36| - +5V
                        PRG  A8 - |14      35| - PRG  D4
                        PRG  A9 - |15      34| - PRG  D5
                        PRG A10 - |16      33| - PRG  D6
                        PRG A11 - |17      32| - PRG  D7
                        PRG A12 - |18      31| - CHR  D7
                        PRG A13 - |19      30| - NC
                        PRG A14 - |20      29| - CHR  D6
                         /RESET - |21      28| - CHR  D5
                             NC - |22      27| - CHR  D4
                        CHR  D0 - |23      26| - CHR  D3
                        CHR  D1 - |24      25| - CHR  D2    
                                  |          |
                                  `----------'
                                    'Galoob'



Pins 31-35 and 37-40 are connected to the PRG Dx lines via 200 ohm
resistors.  Their function is to prevent a bus conflict.  There is
a 4K ROM ROM connected to the PRG address/data bus.  It's /OE line is
tied to ground and it's /CE line is tied to pin 3 of the above chip.
All lines pass thru from board edge to cart socket except the
following:  50, and 65.  These correspond to PRG /CE, and /A13

[vuehbwhq]

(sidenote: bootgod's site doesn't give its highest-resolution images by default.)

Let me help you with that!

[Myask]

always (@ posedge error) desk <= head;

...Does anyone else want to pop out of the woodwork with a better image now? (For the record, I was referring to that it disgorges a 600px version if unargumented, and I got a 700px version.) Does one need to register for larger?

...well, now it looks like the EXP mystery pin is easier to track, it hadn't escaped under chip so much as mess-of-resistors-and-silkscreen. e: yet. It heads through a via right by the C of "C2" (that is, the silkscreen, not the component) and then has a via back topside that is hidden by (but isn't under) the chip.

Mystery 2: Cart CPUd2 is connected to GENIE d2 and d3 both.

Mystery 3: Genie ROM/CE goes through capacitors C1, C2, R2, D1:

(a) - R2 - (b)
(a) - D1 - (b)
(a) - C1 - (c) - C2 - (b)
(c) - GND

...and (b) occupies one side of the board-tracery, while also heading into the same region as the EXP8 via (but out of sight, naturally, so no assumptions...)

e2: Guessed wrong in tracing under the capacitors. Not rested enough to fix things now.

Isn't it just great that CPU and PPU have opposite initial letters from CHR and PRG?

[Memblers]

That EXP8 pin goes to nothing, it's a dead end. Strange. I wonder if they could have used it to reset the chip or something (on a different board version).

[muramasa]

Can anyone help me identify the diodes on these? I can see they have stripes but am partially color blind and am struggling to identify them.

[lidnariq]

D2, despite the color bands, is just a normal diode, being used as part of some resistor-diode logic.

D1 is part of a power-on-reset timer.

I wouldn't be surprised if both could be replaced by an ordinary off-the-shelf signal diode.

My best guess as to color of the bands is [wide yellow] [brown] [yellow] [grey] ... which might literally translate to the 1N4148 small signal diodes that I guessed them to be.

[muramasa]

Thanks for the help. I'll give it a try and see what happens.