Sega Genesis SRAM protection

[getafixx]

Hey all,

I've been tinkering with Sega Genny boards again, and was trying to replace the BA6162 battery supervisor that they use in their boards. I figured that a diode setup similar to what is found in the NES would work...but it doesn't. Well, the game holds a save, but if you power it on and off a few times, or run your finger along the contacts on the cart the save disappears. So it KIND OF works, but is extremely sensitive. I've used the same method in SNES carts with 256K SRAM before and had no issues, though.

Here is how its wired up:

example.png

Any ideas on what else I'd need to do?

[getafixx]

bump, still hoping for some help with this one.

[Memblers]

Isn't there normally a 4.7uF capacitor in there somewhere? I haven't done a backup circuit so I'm not certain. Not sure if it would help, but could be worth a try.

If you're looking for an IC replacement, you could look at the MIC2755 or TPS3619.

[getafixx]

If you're looking for an IC replacement, you could look at the MIC2755 or TPS3619.

Fair enough, but I was hoping for a simpler and cheaper option. Those chips are both a few dollars a piece unless buying in the thousands, which isn't an option.

For that 4.7uF cap, any idea where that would go? Is that tied to VCC on the SRAM? I'd tried a 0.1uF cap on there, but maybe that isnt enough...

[lidnariq]

I have no idea why it's not working, but you should be able to use a PNP brownout detector with a 74HC00 to generate the desired enable for the SRAM.

[getafixx]

I have no idea why it's not working, but you should be able to use a PNP brownout detector with a 74HC00 to generate the desired enable for the SRAM.

Doesn't the enable come from the 74HC139 decoder?

Also, in the schematic you linked to, that appears to be for an SRAM with 2 enables (/CE and CE). Since a 256K has only an active-low chip enable, how would that schematic work with it, or would it just need an inverter?

[lidnariq]

Right.

On a SRAM with two enables, +CE must be high (in this case, the /BROWNOUT signal from the BJT) and -CE must be low (in this case, the /CE from the memory decoder) in order to enable the RAM.

On a SRAM with one enable, you'd have to combine them yourself, such as by using half a 74'139 or two NAND gates. (The NAND gates or '139 will have to be powered by the UPS from the battery for this to work)