PPU pinout

[mikejmoffitt]

VRAM is accessed exculively with $2006 and $2007

I have a question here, I searched in the PPU registers documentaion about how the PPU differentiate between the read to VRAM and the write to it through both registers , but I found nothing

There is a read/write pin for the 2A03->PPU communication, as well as a read/write pin for the PPU's VRAM bus. The former is driven by the CPU, and the latter is driven by the PPU when appropriate.

[Muhammad_R4]

VRAM is accessed exculively with $2006 and $2007

I have a question here, I searched in the PPU registers documentaion about how the PPU differentiate between the read to VRAM and the write to it through both registers , but I found nothing

There is a read/write pin for the 2A03->PPU communication, as well as a read/write pin for the PPU's VRAM bus. The former is driven by the CPU, and the latter is driven by the PPU when appropriate.

the first for writing to registers I think

but the pin-out says the the other rd,wr are output from the PPU , shouldn't them be inputs ? to make the CPU access the VRAM ?

[rainwarrior]

but the pin-out says the the other rd,wr are output from the PPU , shouldn't them be inputs ? to make the CPU access the VRAM ?

VRAM is not inside the PPU, it's a separate RAM chip on the board (or sometimes a RAM or ROM chip inside the cartridge), they are outputs from the PPU to this external device.

[tokumaru]

to make the CPU access the VRAM ?

The CPU never has access to VRAM. When writing to VRAM, the CPU sends the data to the PPU, and then the PPU forwards it to VRAM. The opposite happens when reading, but since the PPU can't read from the PPU and forward the byte to the CPU fast enough, PPU reads are buffered, so every time the CPU reads from $2007, it gets the value that was fetched during the previous read, and a new byte is buffered for the next read.

[Muhammad_R4]

OK I understood this all , but I think I haven't explained it well

my question is how to tell the PPU to write to ( or read from ) the VRAM
for both reading and writing , both registers are used , so I think there must be an input signal according it the PPU will know if the data in the registers is write to VRAM or the opposite.

[Bregalad]

The CPU R/W pin is connected to the PPU, so the PPU can detect if the registers mapped at $2000-$2007 are written to or read from. A read to $2007 will trigger a VRAM read on next cycle (and the value currently in the buffer is returned to the CPU), a write to $2007 will trigger a VRAM write on next cycle. I am not 100% sure, but I think it is yet unknown if the read buffer is also used when writing, or if a separated buffer is used. This would be very easy to verify, though.

[tokumaru]

my question is how to tell the PPU to write to ( or read from ) the VRAM

Whenever the CPU accesses an address between $2000 and $3FFF, an address decoder inside the NES will tell the PPU to react to this, and the PPU will decide what to do based the address (register) being accessed and on the CPU's R/W signal.

[thefox]

I am not 100% sure, but I think it is yet unknown if the read buffer is also used when writing, or if a separated buffer is used. This would be very easy to verify, though.

It has been verified not to be the same buffer. This was that case where capacitance holds the output data on an internal bus long enough until it's written out. (You can find more info by searching.)

[Muhammad_R4]

I will illustrate my question with example
we know that the CPU can't access the VRAM directly, so we need to first to write in 2006 and 2007 ( if writing )

I am not familiar with NES assembly but i will try.

assume i will write FF to the VRAM in address 0x1000

Code: Select all

LDA 00       ; load accumulator
STA 2006    ; 1st write
LDA 10    
STA 2006
LDA FF
STA 2007

now I want to read what I wrote in 0x1000

Code: Select all

LDA 00
STA 2006
LDA 10
STA 2006

both codes will access the VRAM , one for write and one for read
how will the PPU understand that the CPU wants to write to the VRAM in the first code and wants to read from the VRAM in the second code ?

I hope my question is now obvious.

[rainwarrior]

how will the PPU understand that the CPU wants to write to the VRAM in the first code and wants to read from the VRAM in the second code ?

Distinguishing reads from writes is easy:

STA $2007 writes to the PPU.

LDA $2007 reads from the PPU.

The tricky part is that reads are buffered by the PPU, so it's actually always one byte behind.

Code: Select all

LDA #$10
STA $2006
LDA #$00
STA $2006
LDA $2007
LDA $2007 ; this actually gets the byte you were looking for

[tokumaru]

I am not familiar with NES assembly but i will try.

You got the basic idea, but you need a # if you want to load immediate values into the CPU registers. And you also need a $ if you're using hex numbers. For example, LDA 00 will put the contents of memory location $0000 into A, while LDA #$00 will put the value 0 into A. Another thing worth pointing out is that addresses written to $2006 are written high byte first.

how will the PPU understand that the CPU wants to write to the VRAM in the first code and wants to read from the VRAM in the second code ?

For the $2006 writes, it simply doesn't matter, because nothing is being written or read yet, as the PPU is just seeing up a pointer to access memory later. Once the actual read/write from/to $2007 happens, the CPU will output a signal indicating whether it's reading or writing data. This signal is essential even for memory to work correctly, because memory chips need to know whether they're being written to or read from. Anyway, the PPU too can see this signal, so it knows whether to read from our write to VRAM.

[Muhammad_R4]

the CPU will output a signal indicating whether it's reading or writing data. This signal is essential even for memory to work correctly, because memory chips need to know whether they're being written to or read from. Anyway, the PPU too can see this signal, so it knows whether to read from our write to VRAM

That's I am talking about , where is this signal in the PPU pinout ?

http://wiki.nesdev.com/w/index.php/PPU_ ... escription

[tokumaru]

It's pin 1 (R/W), apparently:

R/W, CPU D0-D7, and CPU A0-A2, are signals from the CPU.

[Muhammad_R4]

It's pin 1 (R/W), apparently:

but I think those for reading/ writing to PPU internal registers

[tokumaru]

Yes, and $2007 is a PPU register too. When $2007 is accessed, the PPU will check the R/W signal in order to decide whether to read from or write to VRAM.