nesdev.org

There is a bunch of audio filtering, both low- and high- passes, but the electrolytics were big enough that both Krzysiobal and I gave up on trying to figure out what's going on.

Regardless, we couldn't see the sizes of the electrolytics in these pictures, so couldn't tell you the audio filtering corner frequencies regardless of whether we had a correct schematic.

I got from MLX a little bit different (older) version of this cartridge - there's minor difference in the analog part - less resistors, so I finally was able to rev-en it with proper values of elements.
They even splitted the GND between analog and digital circuits.

I will try to make repro of this board





ROM CRC32 is 978002FD

I haven't put very much time in analyzing it, but it does not output microphone sound (and did not display volume level from it), so it probably has design flaw or something is broken.


I also dumped the pal:

krzysiobal wrote:ADC-CLK = Probably non-combinatorial
ADC-!CS! = Probably non-combinatorial

Given prior evidence, those should both latch the values written to the $80s bit at $C003 and $C002 respectively.

ADC-D

I'd have thought there should be some way for the CPU to drive this node high ; the ADC requires that the first bit that's clocked into it be high (and, given how this is wired, also the 2nd bit).

CPU-D7 Probably non-combinatorial

That's more surprising to me. As far as I can tell, it should "just" relay the value from ADC-D when (address&$E003)==$6003 (and be hi-Z otherwise)

REG-CLK = (CPU-A1) | (CPU-A0) | (CPU-R/!W!) | (CPU-!ROMSEL!) | (CPU-A14) | (CPU-A13);
adr 1000000000000000 0x8000
mask 1110000000000011 0xE003

We know for certain that the later revision of this hardware also cares about A2 and A3 ... much to my surprise.

The K-663A can be replaced with YM2413, which can be still bought from aliexpress and it sounds the same (even better because when there is silence, the original K-663A produces buzz)



Of course you need to be quite lucky, out of 10 chips, 3 were bad: 1 did not output any melody at all and 2 others sounded like some channels were missing.

I read back the GAL using TL866 and then programmed other GAL16V8 using its contents and it's working, so probably it wasn't protected against writes.

Hm. I tried analyzing that fusemap using jed2eqn, and it complained. So I looked closer ... and it's using an operational mode that Lattice's datasheet doesn't define.

*L02176 100000011111000000

those last two bits are called SYN and AC0. Lattice only explains what 01, 10, and 11 mean.

National's datasheet does mention that the two function independently:

The SYN bit controls whether a device will have any registered outputs (SYN=0) or will be purely combinatorial (SYN=1). The SYN bit determines whether device pins 1 and 11 are used as the clock and global TRI-STATE control inputs (SYN=0) or whether they are ordinary inputs (SYN=1). The AC0 bit selects between the "Small-PAL" mode and the "Medium/Registered-PAL" modes. The function of the AC1 bits depends on the state of the AC0 bit. In "Small-PAL" mode (AC0=0), the AC1 bit in each [output logic macrocell] determines whether the associated device pin is an output (AC1=0) or an input (AC1=1)

It then continues to give an example of permissible modes and also excludes the 00 combination.

SYN=0 means that pin 1=M2 serves as the clock, and pin 11=PRGA21 controls whether the outputs can serves as /OE ? Er. But:
AC0=0 means that all pins are always an input or an output and ignores pin 11.

Well, small wonder that the ADC doesn't work.

AC1 exists per output; there are 8 bits. Bits 2120 through 2127 are b'00001100'; this means the following:
Pins 19 & 12 are always an output, have 8 AND terms, the output of the register is not presented on the pin, but the output of the register is available inside the AND-OR plane.
Pins 18,17,16, & 13 are always outputs, have 8 AND terms, the output of the register is not presented on the pin, but the value on the next-higher-numbered pin is available inside the AND-OR plane.
Pins 15 & 14 are always inputs, have 8 AND terms, the output of the register would be presented on the pin, the value on the next-higher-numbered pin is available inside the AND-OR plane.

XOR exists per output; there are 8 bits. Bits 2048 through 2055 are b'01100001', meaning that pins 18, 17, and 12 are inverted relative to the logic from the AND-OR plane.

Meanwhile, the fusemap includes an 8-byte "user signature" in bits 2056 through 2119, which happens to be ASCIIZ: "GAL16V8\x0"

krzysiobal:

In regard to the K-663A, I see that it's used in certain bootleg arcade machines. I do not see any datasheets for it or who produces it. If you program it with all known modes of the YM2413 does it react in the same manner? Are there any registers outside of the normal YM2413 that behave differently?

Also I see that some chips in bootleg arcade units are labeled K-663.

Not much info on these...