Re: Why the hoop jumping?
Posted: Mon Apr 16, 2018 11:21 pm
Back to my original post for a second...
Having looked at a couple of more cases where they use the above "system".. the penny dropped.
The 65816 unlike every other CPU/System that lets me move the Z/B/DP and the SP is byte aligned. The others are Page aligned. Hence the TSC TCD part was confusing me, as in why would you set the DP to be the same page as the SP?? It doesn't, it sets it to be the current location of the bottom of the stack so LDA $04 reads the 4th thing on the stack... I mean I also assumed if one was to do such a thing on a 65816 you would use lda ($04,s ).. to have stack relative and to not use it is criminal... So now it is senseless but makes sense
Having looked at a couple of more cases where they use the above "system".. the penny dropped.
The 65816 unlike every other CPU/System that lets me move the Z/B/DP and the SP is byte aligned. The others are Page aligned. Hence the TSC TCD part was confusing me, as in why would you set the DP to be the same page as the SP?? It doesn't, it sets it to be the current location of the bottom of the stack so LDA $04 reads the 4th thing on the stack... I mean I also assumed if one was to do such a thing on a 65816 you would use lda ($04,s ).. to have stack relative and to not use it is criminal... So now it is senseless but makes sense