SNES-CD Ram Cartridge Part list and pictures.

[muramasa]

Terry was nice enough to take some scans of the SNES CD Ram Cartridge and read off part numbers. I went ahead and did it in the same format that nocash had on his site.

IC1 64pin Nintendo S-WRAM (128Kx8 DRAM) 9148 27 S
IC2 64pin Nintendo S-WRAM (128Kx8 DRAM) 9148 27 S
IC3 32pin HN2xxxxxx? (Sticker 0.95 SX) (ROM/EPROM) HN2XXXXX2
IC4 28pin SONY CXK5864BM-12LL (8Kx8 SRAM) 143E06E
IC5 16pin 74F139 (Dual 2-input 4-output Line Decoder/Demultiplexer) 74F139 120EZ
IC6 14pin 74F32 (Quad 2-input OR gates) 74F32 J 105AR
IC7 16pin 74F138 (1-of-8 inverting decoder/demultiplexer) 74F138 117F0
IC8 14pin ALS04B (Hex Inverter) ALS04B 16KC
IC9 14pin ALS30A (8-input Positive-Nand Gates) ALS30A 01KC
IC10 16pin ALS161B (Synchronous 4-bit Decade and Binary Counters) ALS161B 03B
IC11 16pin Nintendo D411 (NTSC CIC) D411 9137 BA

[lidnariq]

Hm. The parts on the board aren't complex enough match the full technical description in nocash's FullSNES. But unfortunately, too many traces are hidden under parts – especially the small 74xx series ICs – to be able to figure out what the hardware actually does do.

The only thing I'm pretty certain of is that I believe the 74xx parts aren't connected to the data bus, so those registers documented at $21D0/21E0/21E5 shouldn't care about the specific value written.

[TmEE]

Those two e-caps should be replaced, they will leak and damage stuff sooner or later.

[nocash]

Why are you saying SNES-CD Ram? Wasn't it a CD ROM? Or did you mean the WRAM chips on the cart?

The parts list is nice, thanks!

All the logic chips are looking more or less complex enough to me. I haven't tried to follow the databus traces to see if they are going to the logic chips, but if they are, then they might get compared to the counter output... and lock SRAM by resetting the counter on mismatch. The 8-input NAND gate smells like decoding LSBs of 21D0h/21E0h. Not sure if there's anything for decoding 21E5h. Or if databus isn't used, maybe it just relies on resetting the counter, and then clocking it exactly 15 times.
And the WRAM chips, they have a lot of /CS and CS pins for mapping themselves anywhere to the 21xxh space, they are probably doing so, it does just depend on how that pins are wired up.

The photographers artwork makes me shiver as usually, white background with more white background, but well, that's better than a cropped photo showing only the lower left corner of the PCB drained in flashlight and half covered by the photographers fingers. Anyways, having a photo showing the PCB back side is nice. There's really a battery on it. And, EXPAND (cart pin2) seems to be wired to GND, guess that's used to enable the I/O ports for the cdrom hardware (and to disable it when using other/game cartridges).

I've never seen a leaking capacitor, I wouldn't say that capacitors are anywhere as dangerous as acid filled clock batteries used in Amiga's and early PC mainboards. I wouldn't replace that capacitors until/unless they stop working someday. Hmmm, with the rectangular looking package, are that electrolyt capacitors at all? Well, guess they are (going by the +/- pins).

[TmEE]

All hardware where I have seen these types of capacitors have them already lost all their capacitance and usually electrolythe is leaking out. Most of them are Game Gears, some laptops, a HDD and some other hardware.

[tepples]

Why are you saying SNES-CD Ram? Wasn't it a CD ROM? Or did you mean the WRAM chips on the cart?

"SNES-CD RAM cartridge" or "RAM cartridge of SNES-CD" refers to the cart. It fulfills the same function as the "RAM cartridge" of the Famicom Disk System and the "System Card" of the TurboGrafx-16.

Are the leaking capacitors in any way related to the 1999-2007 incident involving Tayeh, Choyo, and Chhsi low-ESR aluminum electrolytic caps based on a formula stolen from Rubycon?

[lidnariq]

if databus isn't used, maybe it just relies on resetting the counter, and then clocking it exactly 15 times.

That's exactly what's happening.

There's only four signals around the 74'161: SNES/RESET (which resets it), SNES/PAWR (which clocks it), some signal generated by other logic (hooked up to '161 /LD, i.e. controls whether the clock increments or reloads with 0), and the carry output (i.e. it's high when the counter is 15).

The carry output is inverted, then combined with SNES/WR using an OR gate, and then the trace hides under the ROM socket. But given your functional description, it would make sense if that signal is just the 8K RAM's /WR input.

And the WRAM chips, they have a lot of /CS and CS pins for mapping themselves anywhere to the 21xxh space, they are probably doing so, it does just depend on how that pins are wired up.

I've traced enough of the signals to see that they're definitely connected to the PA bus. Unfortunately, there isn't enough information to even guess about routing, let alone trace any signal other than PA7.

(PA7 is definitely connected to pin 51)