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$8001 ~[...PPPP.] (mask=$E001)
||||
|+++- PRG bank at $6000
+---- PRG chip select:
0 = PRG1 = IC2
1 = PRG2 = IC3
$6000 $8000 $a000 $c000 $e000
----- ----- ----- ----- -----
Bank $8001 0000 0001 0010 0011
Chip PRG1/2 PRG3 PRG3 PRG3 PRG3
* Wiki claims that AC-08 is mapped do 42.0, which is not compatible.
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PAL pinout:
.--v--.
M2 -> |01 20| -- +5V
CPU_nROMSEL -> |02 19|
CPU_A14 -> |03 18| -> PRG_A13
CPU_A13 -> |04 17| -> PRG_A14
CPU_RnW -> |05 16| -> PRG_A15
CPU_D4 -> |06 15| -> PRG2_nOE
CPU_D3 -> |07 14| -> PRG1_nOE
CPU_D2 -> |08 13| -> PRG3_nOE
CPU_D1 -> |09 12| -> PRG12_nCE
GND -- |10 11| <- CPU_A0
'-----'
Expected PAL equations:
PRG_A13 <= CPU_D1 when M2='1' & CPU_nROMSEL='0' and CPU_A14='0' and CPU_A13='0' and CPU_A0='1' and CPU_RnW='0' --latch
PRG_A14 <= CPU_D2 when M2='1' and CPU_nROMSEL='0' and CPU_A14='0' and CPU_A13='0' and CPU_A0='1' and CPU_RnW='0' --latch
PRG_A15 <= CPU_D3 when M2='1' and CPU_nROMSEL='0' and CPU_A14='0' and CPU_A13='0' and CPU_A0='1' and CPU_RnW='0' --latch
PRG2_nOE <= CPU_D4 when M2='1' and CPU_nROMSEL='0' and CPU_A14='0' and CPU_A13='0' and CPU_A0='1' and CPU_RnW='0' --latch
PRG1_nOE <= not PRG2_nOE --or either latches not CPU_D4 like above, but functionally equivalent
PRG3_nOE <= '0' when M2='1' and CPU_nROMSEL='1' and CPU_A14='1' and CPU_A13='1' and CPU_RnW='1' else 0
PRG12_nCE <= '0' when CPU_nROMSEL='0' and CPU_RnW='1' else 0