nestest questions?

Discuss emulation of the Nintendo Entertainment System and Famicom.

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Zepper
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nestest questions?

Post by Zepper »

from line 101 of the nestest.log

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C822  A9 FF     LDA #$FF                        A:2F X:00 Y:00 P:2F SP:FB CYC: 80 SL:243
C824  48        PHA                             A:FF X:00 Y:00 P:AD SP:FB CYC: 86 SL:243
C825  28        PLP                             A:FF X:00 Y:00 P:AD SP:FA CYC: 95 SL:243
*C826  D0 09     BNE $C831                       A:FF X:00 Y:00 P:EF SP:FB CYC:107 SL:243
My emulator:

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C822  A9 FF     LDA #$FF                        A:2F X:00 Y:00 P:2F SP:FB CYC: 80 SL:243
C824  48        PHA                             A:FF X:00 Y:00 P:AD SP:FB CYC: 86 SL:243
C825  28        PLP                             A:FF X:00 Y:00 P:AD SP:FA CYC: 95 SL:243
*C826  D0 09     BNE $C831                       A:FF X:00 Y:00 P:FF SP:FB CYC:107 SL:243
- PLP instruction - It reads (push) ram[0x1FB] which returns $FF, but it should be $EF (see register P) according to nestest.log.
- ram is fully initialized with zeroes.

I need some advice on it.

EDIT: well, is the $10 bit ignored on "push from stack" ?
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Quietust
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Re: nestest questions?

Post by Quietust »

Zepper wrote: Sat May 15, 2021 7:06 am - PLP instruction - It reads (push) ram[0x1FB] which returns $FF, but it should be $EF (see register P) according to nestest.log.
Bits 0x10 (B) and 0x20 (unused) technically do not exist in the status register, and the emulator which was used to create the reference log treats the first as being clear (so that NMI/IRQ can push it as-is and PHP/BRK can easily override it) and the second as being set (since PHP+BRK+IRQ+NMI all push it set).
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Zepper
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Re: nestest questions?

Post by Zepper »

One thing.
As I reset the PPU and APU before the CPU, the PPU cycle counter does not match the one in nestest.log, which assumes PPU cycle 0 before the first instruction. Therefore, my PPU cycle counter is at 24 instead of zero due to the RESET procedure.
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Quietust
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Re: nestest questions?

Post by Quietust »

Zepper wrote: Sun May 16, 2021 5:46 pm One thing.
As I reset the PPU and APU before the CPU, the PPU cycle counter does not match the one in nestest.log, which assumes PPU cycle 0 before the first instruction. Therefore, my PPU cycle counter is at 24 instead of zero due to the RESET procedure.
The latest version of nestest.log (linked from the wiki) should already be taking this into account - the very first instruction is labeled with CPU cycle 7 and PPU coordinates 0,21:

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C000  4C F5 C5  JMP $C5F5                       A:00 X:00 Y:00 P:24 SP:FD PPU:  0, 21 CYC:7
Quietust, QMT Productions
P.S. If you don't get this note, let me know and I'll write you another.
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