I wanted to open this discussion because I was inspired by this image (https://static.miraheze.org/n64wiki/e/e ... capped.jpg) to do some similar rectangular boxes and labels for the SNES PPUs.
Using these source images (http://www.siliconpr0n.org/map/nintendo/ and specifically, nintendo_s-ppu1-5c77_mz_ns20x.jpg and nintendo_s-ppu2-5c78-01_mz_mit20x.jpg) I have color-coded rectangular sections and numbered them on the die shots. 93143 has pointed out that the S-PPU has not been reverse engineered from a decap yet (viewtopic.php?p=279451#p279451,) though I am curious if anyone at least knows what any of these rectangular sections do at a high level.
At first glance, it looks like S-PPU2 is a lot simpler than S-PPU1. I think there is value in having some high level idea of what these chips do and where physically that is implemented in hardware as it sounds like decapping is hard to do, and it will clear up a lot of confusion (for example, when you can visually see that OAM is on a separate chip than the CPU it makes sense why you have to access it through OAMDATA).
Perhaps we can figure out some sections from the schematic: https://wiki.superfamicom.org/uploads/s ... _color.png
Also, if there is a better name than "rectangular sections" I definitely want to know it.
Identifying regions of PPU die photo
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- jeffythedragonslayer
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Identifying regions of PPU die photo
Last edited by jeffythedragonslayer on Wed Jun 29, 2022 11:30 am, edited 1 time in total.
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Re: Identifying PPU rectangular sections
1 and 2 are OAM
5 and 6 are line buffer
15 is color palette
5 and 6 are line buffer
15 is color palette
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Re: Identifying PPU rectangular sections
- Attachments
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- PPU1 pinout.pdf
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My current setup:
Super Famicom ("2/1/3" SNS-CPU-GPM-02) → SCART → OSSC → StarTech USB3HDCAP → AmaRecTV 3.10
Super Famicom ("2/1/3" SNS-CPU-GPM-02) → SCART → OSSC → StarTech USB3HDCAP → AmaRecTV 3.10
- jeffythedragonslayer
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Re: Identifying PPU rectangular sections
That'll be a good help creaothceann. Psychopathicteen, I'm curious how you figured those ones out.
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Re: Identifying PPU rectangular sections
Someone took a look at the die shots here.
My current setup:
Super Famicom ("2/1/3" SNS-CPU-GPM-02) → SCART → OSSC → StarTech USB3HDCAP → AmaRecTV 3.10
Super Famicom ("2/1/3" SNS-CPU-GPM-02) → SCART → OSSC → StarTech USB3HDCAP → AmaRecTV 3.10
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Re: Identifying PPU rectangular sections
Regionsjeffythedragonslayer wrote: ↑Tue May 31, 2022 11:34 am Also, if there is a better name than "rectangular sections" I definitely want to know it.
12 and 17 look like registers.
10 is probably combining sprite + layer
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Re: Identifying PPU rectangular sections
Any idea what most of PPU2 could be? There are 13 darker horizontal stripes and 2.5 vertical ones - perhaps shift registers for the tiles, and the white areas inbetween might (also) do bitplane conversion.
PPU2 does the analog output, including the brightness control of register $2100; loading the tiles from VRAM; controlling access to CGRAM; storing the Color Constant, subscreen pixel; do windows and color math; probably the fine background scrolling; most of register $2133. PPU2 might also do the Mode7 matrix calculations, and control the CPU's access to VRAM.
I think I read somewhere that one PPU does the horizontal mosaic and the other does the vertical mosaic functionality.
EDIT:
PPU1 probably does most of the "input" - horz/vert. counters; deciding which sprites and tiles are to be drawn; controlling access to OAM; probably processing the rough background scrolling (in 8-pixel units).jeffythedragonslayer wrote:I am curious if anyone at least knows what any of these rectangular sections do at a high level
PPU2 does the analog output, including the brightness control of register $2100; loading the tiles from VRAM; controlling access to CGRAM; storing the Color Constant, subscreen pixel; do windows and color math; probably the fine background scrolling; most of register $2133. PPU2 might also do the Mode7 matrix calculations, and control the CPU's access to VRAM.
I think I read somewhere that one PPU does the horizontal mosaic and the other does the vertical mosaic functionality.
EDIT:
anomie wrote:The PPU chips also each have their own MDR, which is updated only when said PPU chip is read. When you read a register with unmapped bits, the PPU fills in only those bits that are defined and leaves the remaining bits as the MDR has them. PPU1's MDR is set by reading $2134-6 or $2138-A, and may also be read from the write-only registers $21x4-6 and $21x8-A (x=0-2). PPU2 involves registers $213B-D only (and maybe $21xB-D, but this is unverified).
My current setup:
Super Famicom ("2/1/3" SNS-CPU-GPM-02) → SCART → OSSC → StarTech USB3HDCAP → AmaRecTV 3.10
Super Famicom ("2/1/3" SNS-CPU-GPM-02) → SCART → OSSC → StarTech USB3HDCAP → AmaRecTV 3.10
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Re: Identifying PPU rectangular sections
I finished the drawing, it now has proper labels for PPU1 and PPU2, plus the areas for OAM (lower table), line buffers, CGRAM and DAC.
Downloads: PDF PNG project files
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Downloads: PDF PNG project files
.
My current setup:
Super Famicom ("2/1/3" SNS-CPU-GPM-02) → SCART → OSSC → StarTech USB3HDCAP → AmaRecTV 3.10
Super Famicom ("2/1/3" SNS-CPU-GPM-02) → SCART → OSSC → StarTech USB3HDCAP → AmaRecTV 3.10