I used TheFox's MMC3 mapper as an alternative until now, but I always preferred the original plain mappers with game genie support to having that savestate menu inserted.
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Edit: After a few more revisions it was improved even more, see attempt 13 below instead.
Original post continues below this line.
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Anyway, I think I've fixed it:
Source code for some of these mappers was found: here.
This was a 1 line change to the a12 filter:
Code: Select all
reg a12;
wire a12clear;
always@(posedge chrain[12], posedge a12clear)
if(a12clear)
a12<=0;
else
a12<=1;
reg [2:0] a12count;
always@(posedge m2)
if(chrain[12])
a12count<=0;
else if(a12count!=7)
a12count<=a12count+1;
assign a12clear=a12count==7; // fix: ==6 was causing jitter
// assign a12clear=a12count==6;
Also, as an aside, it has this warning, which I don't know enough about the Xilinx stuff to understand. Not sure if it's something that should be addressed:
Code: Select all
WARNING:PhysDesignRules:372 - Gated clock. Clock net mapper/irqtrip is sourced
by a combinatorial pin. This is not good design practice. Use the CE pin to
control the loading of data into the flip-flop.