SMB3 Title Screen Problem, Checkered Floor Wobbling

Discuss emulation of the Nintendo Entertainment System and Famicom.

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pala
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Joined: Wed Jun 29, 2022 11:30 am

SMB3 Title Screen Problem, Checkered Floor Wobbling

Post by pala »

This just did my head in. I was trying to pass the mmc3_test_2 tests and just testing if certain games worked (SMB3, Megaman 3, Kirby's Adventure).

My mmc3_test_2 progress so far:
- 1-clocking PASS
- 2-details PASS
- 3-A12_clocking PASS
- 4-scanline_timing FAIL #8 (Scanline 0 IRQ should occur later when $2000=$10)
- 5-MMC3 PASS
- 6-MMC3_alt FAIL #2 (didn't implement alternate behavior yet)

What I noticed when playing through the SMB3 intro is that the checkered floor wobbles up and down rather than just staying still.
Other than that, the HUD is a little glitchy but the rest of the game runs just fine.

Title screen glitching: https://imgur.com/a/s0lSzfZ
HUD glitching: https://imgur.com/a/iAkp4Ke

Has anyone ever dealt with this? If you've fixed it, how did you fix it?
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Dwedit
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Re: SMB3 Title Screen Problem, Checkered Floor Wobbling

Post by Dwedit »

Make sure you also have timing correct for scrolling (Loopy V and Loopy T updating/incrementing at particular times)

https://www.nesdev.org/w/images/default/4/4f/Ppu.svg
https://www.nesdev.org/wiki/PPU_scrolling

On Dot 256 vertical part of T is incremented, on dot 257, horizontal parts of V = horizontal parts of T.

---

On the side, to get horizontal raster effects working properly (Slalom, F1 Race, Etc), for Horizontal Scroll writes, Fine X takes effect immediately, and "Coarse X" only affects the horizontal bits of T. Horizontal bits of V are set to horizontal bits of T at dot 257.
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pala
Posts: 4
Joined: Wed Jun 29, 2022 11:30 am

Re: SMB3 Title Screen Problem, Checkered Floor Wobbling

Post by pala »

Dwedit wrote: Tue Nov 01, 2022 9:29 am Make sure you also have timing correct for scrolling (Loopy V and Loopy T updating/incrementing at particular times)

https://www.nesdev.org/w/images/default/4/4f/Ppu.svg
https://www.nesdev.org/wiki/PPU_scrolling

On Dot 256 vertical part of T is incremented, on dot 257, horizontal parts of V = horizontal parts of T.

---

On the side, to get horizontal raster effects working properly (Slalom, F1 Race, Etc), for Horizontal Scroll writes, Fine X takes effect immediately, and "Coarse X" only affects the horizontal bits of T. Horizontal bits of V are set to horizontal bits of T at dot 257.
Yep, I've got (assuming from games and tests) proper update timing. Still can't figure out what could be happening.
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Dwedit
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Re: SMB3 Title Screen Problem, Checkered Floor Wobbling

Post by Dwedit »

Maybe some basic logging here...

Write down the timestamps of the writes that set up the interrupt and enable it
Write down the timestamp that the interrupt fires on, and when the 6502 has completed jumping to the IRQ handler.
Write down the timestamps and values of scroll/vram address writes.

Timestamps are usually given in scanline and dot.
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posit
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Joined: Tue Oct 11, 2022 11:40 pm

Re: SMB3 Title Screen Problem, Checkered Floor Wobbling

Post by posit »

> 4-scanline_timing FAIL #8 (Scanline 0 IRQ should occur later when $2000=$10)

Man. This threw me for a good week as well. There are other ways to approach this, but I redesigned syncing 3 times and it is now based on rising/falling edge of CPU clock (basically M1/M2). ... and it still didn't pass. This process knocked out little bugs along the way, and every other test I can get my grubby hands on (apart from some of the obscure glitch verification tests such as controllers and DMA) pass. How frustrating.

What *solved* it in the end, was taking great care between with all dummy nametable and the dummy pattern lookups. I had one that would end up with an incorrect A12 bit due reusing a previous address instead of forcing a constant address or something.

Now RAMBO-1 is driving me crazy...
pala
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Joined: Wed Jun 29, 2022 11:30 am

Re: SMB3 Title Screen Problem, Checkered Floor Wobbling

Post by pala »

Dwedit wrote: Tue Nov 01, 2022 9:25 pm Maybe some basic logging here...

Write down the timestamps of the writes that set up the interrupt and enable it
Write down the timestamp that the interrupt fires on, and when the 6502 has completed jumping to the IRQ handler.
Write down the timestamps and values of scroll/vram address writes.

Timestamps are usually given in scanline and dot.
Thanks! Fixed my issue, turns out my bitmasking for the PPUADDR writes were wrong :///
pala
Posts: 4
Joined: Wed Jun 29, 2022 11:30 am

Re: SMB3 Title Screen Problem, Checkered Floor Wobbling

Post by pala »

posit wrote: Fri Nov 04, 2022 12:54 pm > 4-scanline_timing FAIL #8 (Scanline 0 IRQ should occur later when $2000=$10)

Man. This threw me for a good week as well. There are other ways to approach this, but I redesigned syncing 3 times and it is now based on rising/falling edge of CPU clock (basically M1/M2). ... and it still didn't pass. This process knocked out little bugs along the way, and every other test I can get my grubby hands on (apart from some of the obscure glitch verification tests such as controllers and DMA) pass. How frustrating.

What *solved* it in the end, was taking great care between with all dummy nametable and the dummy pattern lookups. I had one that would end up with an incorrect A12 bit due reusing a previous address instead of forcing a constant address or something.

Now RAMBO-1 is driving me crazy...
Thanks for the insight. I'll tinker around with the BG fetching logic until I pass. Will report any interesting findings if I get too stuck.
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