The logic behind /ROMSEL and /RD in the Snes bus

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bitmask
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Joined: Thu Dec 23, 2021 8:48 am

The logic behind /ROMSEL and /RD in the Snes bus

Post by bitmask »

Hi, regarding the Snes bus, someone knows what pin is asserted first, the /ROMSEL or the /RD? Because in most cartridges the /ROMSEL is connected to the /OE pin of the maskrom and the /RD to the /CE pin of the maskrom, but it only makes sense if the /RD is asserted first or the /CE of the maskrom is actually the /OE and pins are inverted compared to a commercial memory.

Someone knows the details? Thanks....
lidnariq
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Re: The logic behind /ROMSEL and /RD in the Snes bus

Post by lidnariq »

No, it is not the case that in "most" cartridges /OE is connected to /ROMSEL.

Also, it is not the case that in mask ROMs that the two pins are actually /OE and /CE.

/ROMSEL is asynchronously determined from A15 and A17-A23, so it's ready well before /RD is.

You should use /ROMSEL as /CE, and /RD as /OE, unless you explicitly want to keep the game from being able to reflash itself.
bitmask
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Re: The logic behind /ROMSEL and /RD in the Snes bus

Post by bitmask »

For example, the board SHVC-1J3M-20 (hirom) used by Chrono Trigger connects the /RD to the /CE of the maskrom. And the /OE of the maskrom is drived by the Mad-1, that uses the /ROMSEL. The same is true for the board SHVC-1A3M-30 (lorom) used by Treasure Hunter G, and many other boards.

But like you said, makes more sense to connect the /RD to the maskrom's /OE, and the Mad-1 output to maskrom's /CE.

Are you sure that /ROMSEL is ready before /RD?

Maybe in the end the timing works in both cases, but seems strange this choice.
lidnariq
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Re: The logic behind /ROMSEL and /RD in the Snes bus

Post by lidnariq »

Yes, 100% certain that /ROMSEL is stable before /RD. /ROMSEL is, as I said, just derived from the S-CPU's address bus, while /RD is derived from φ2 ("SYSCK") and an internal not-exported R/W signal.

If you search through poot36's posts, he posted a bunch of logic analyzer traces from a slightly-broken SNES, which confirm this.


For a read-only device like a mask ROM, the order of the two being asserted is irrelevant, especially if we don't know if the specific mask ROM supports the same distinction about "lower power vs faster response time due to /CE" that most 'PROMs do. Even if it does, the difference is power consumption and response time, not functioning vs not.
bitmask
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Re: The logic behind /ROMSEL and /RD in the Snes bus

Post by bitmask »

Cool, I'm reading poot36's posts.

Ok, /ROMSEL is ready before, so still didn't understand why /RD is connected to /CE and /ROMSEL to /OE.
Maybe the maskrom from that time woks differently? I asked ChatGpt ( :lol: ) and the response was that by that time some maskroms had all the logic (/OE + /CE) only in the /CE pin, so this could explain why /RD is connected to /CE. But in this case /ROMSEL does nothing? Probably not.

But there are a lot of repro carts that uses commercial eproms, like 27c801 and 29f032 that also connects the /ROMSEL to /OE and /RD to /CE and it still works. Maybe the timings are enough for both cases, but probably it also should work in the "right" way, connecting /ROMSEL to /CE and /RD to /OE.

I'll try to invert the connections of a original maskrom to see what happens.

What you said in the last message of you first answer, that connecting in the "wrong" way can be used to prevent the flash to rewrite itself, means that you know that it works in both ways, and connecting /RD to /CE means that the chip keeps being restarted in every access, so preventing writing commands to the flash?
lidnariq
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Re: The logic behind /ROMSEL and /RD in the Snes bus

Post by lidnariq »

bitmask wrote: Mon Feb 20, 2023 11:10 am Ok, /ROMSEL is ready before, so still didn't understand why /RD is connected to /CE and /ROMSEL to /OE.
Because for a Mask ROM, it's functionally equivalent. (Most OTPROMs and UVEPROMs too.)
Maybe the maskrom from that time woks differently? I asked ChatGpt ( :lol: ) and the response was that by that time some maskroms had all the logic (/OE + /CE) only in the /CE pin, so this could explain why /RD is connected to /CE. But in this case /ROMSEL does nothing? Probably not.
No, you're right, both pins are active. But don't think of them as /OE and /CE - think of them, on a mask ROM, as /CE1 and /CE2.
But there are a lot of repro carts that uses commercial eproms, like 27c801 and 29f032 that also connects the /ROMSEL to /OE and /RD to /CE and it still works.
The only difference, in the absence of low-voltage programming, is whether it's on average higher power or higher latency.
Maybe the timings are enough for both cases, but probably it also should work in the "right" way, connecting /ROMSEL to /CE and /RD to /OE.
It definitely does work in the "right" combination.
What you said in the last message of you first answer, that connecting in the "wrong" way can be used to prevent the flash to rewrite itself, means that you know that it works in both ways, and connecting /RD to /CE means that the chip keeps being restarted in every access, so preventing writing commands to the flash?
Trying to write to Flash with its /CE and /OE pins backwards will end up with the Flash seeing not-/CE (/RD is not asserted) but both /WE and /OE (/ROMSEL and /WR are asserted). Because its /CE isn't asserted, it stays disabled.
bitmask
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Re: The logic behind /ROMSEL and /RD in the Snes bus

Post by bitmask »

The only difference, in the absence of low-voltage programming, is whether it's on average higher power or higher latency.
Ok, so with the "'wrong" way we have less power consumption, because the chip keeps offline more frequently, but has higher latency, because the time to turn the chip online on every read is higher. So, even with this higher latency, it's still enough, given the "low" speed of the cpu clock, right? I think most of these flashes have a latency less than 100ns, and if I'm not mistaken, we need <=120ns, right?

So, if the memory works, seems to be a good idea to connect in the "wrong" way to draw a little less power.

Thanks for your answers.
lidnariq
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Joined: Sun Apr 13, 2008 11:12 am

Re: The logic behind /ROMSEL and /RD in the Snes bus

Post by lidnariq »

The relative power consumption depends on the workload, although not by much.

Since /ROMSEL just stays asserted continuously during cartridge access, it stays in the higher-power mode for 2-6 memory cycles and then is idle for the next 0-7 memory cycles. In contrast, /RD is asserted 3/6 or 5/8 of the time except when a write happens.

So it's not even clear it's net beneficial in terms of average power consumption either. Maybe Nintendo wired them backwards just to make transplants require a faster ROM? But that seems a little too conspiracy-theory to me.
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