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Help w/ SNES board REing
Posted: Sun Apr 15, 2007 6:54 am
by kyuusaku
I'm looking to schematicize the decoding logic in all SNES boards to learn their *absolute* memory maps. (74 series and MAD-1 boards only, no ASICs except DSP) Can anyone help?
(It's really simple and generally doesn't require desoldering, only a "gamebit" screwdriver and continuity tester!)
Posted: Sun Apr 15, 2007 8:53 am
by Bregalad
Format :
SHVC-ABCD-REV
SHVC = Nintendo abrevasion for "Super Famicom".
A = Number of mask ROMs on the board.
Code: Select all
1 = Single ROM (any size)
2 = Two ROMs (usually 512kb + 1MB)
3 = Three ROMs (usually 1MB + 1MB + 512kb)
B = Two ROMs (usually 1MB + 2MB or 2MB+2MB)
L = Two ROMs (usually 2Mb + 4MB)
Y = Two ROMs (usually 512kb + 512kb)
B = Memory mapping
Code: Select all
A = LoROM memory mapping (mode 20)
J = HiROM memory mapping (mode 21)
other = custom memory mapping (often with an ASIC on the board)
C = SRAM size.
Code: Select all
0 = No SRAM on the board
1 = 2 KB
3 = 8 KB
5 = 32 KB
etc...
D = Misc.
Code: Select all
B = SRAM is battery backed with discrete componants
M = SRAM is battery backed and decoded with the MAD-1 chip
N = Adress decoding is done with discrete componants
REV = Revision number
For example : SHVC-1J3B is a board with has one mask ROM on it, HiROM memory mapping, and 8KB of battery backed SRAM but has only discrete logic chips, no MAD-1.
SHVC-1J3M is identical exept that there is a MAD-1 to do the adress decoding and build-in intelligent bettery back up circuit.
So, as far I know, the only difference between those two is where the ROM and RAM are mirrored exactly, and where there is open bus.
Posted: Mon Apr 16, 2007 7:16 am
by kyuusaku
Bregalad wrote:
So, as far I know, the only difference between those two is where the ROM and RAM are mirrored exactly, and where there is open bus.
Exactly, this is why I am doing this! Just the board codes are meaningless.
Posted: Mon Apr 16, 2007 9:57 am
by Bregalad
I'm not too confident with SNES memory mapping either. For board with discrete logic chips, you just need the datasheet of those chips in question.
Most contain just dual adress decoders '139 and/or basic logic gates (such as '00, '04 and '08). I don't know how the MAD-1 works, but it just seems to do much more intelligent adress decoding, thrus not mirroring the data where it would be mirrored with discrete logic chips. I don't know if any game relies on it's data being mirrored where it wouldn't be mirrored with the MAD-1 chip, though.
Posted: Mon Apr 16, 2007 11:24 am
by tepples
Bregalad wrote:I don't know if any game relies on it's data being mirrored where it wouldn't be mirrored with the MAD-1 chip, though.
I know
Mega Man X has noticeable playability issues in an emulator that uses incorrect mirroring.