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Hmm, I wonder, how many cycles does it take to bankswitch on, say, the MMC3, aside from the cycles spent executing the instructions? Additionally, are there any limits on the number of bank switches you can make in any given time peroid?
Bank switches happen instantly on all mappers, so the next instruction comes from the new bank. Only limit to the speed is how fast you can do the write. Could set it up to do 3 bank switches in 3 instructions using a/x/y.
That is the reason a microprocessor cant be used as a replacement for a mapper like mmc3, it cant respond fast enough to do the instant bank switch.
Most mappers finish changing this pointer by the start of the next opcode fetch. For instance, the protection code in the Earthworm Jim HKO that Kevin Horton RE'd depends on this behavior. But some mappers do need multiple cycles to change the pointer, the most prominent of which is Squeedo.
bunnyboy wrote:
That is the reason a microprocessor cant be used as a replacement for a mapper like mmc3, it cant respond fast enough to do the instant bank switch.
One could get insane and have a PLL circuit build from M2 and then have a microprocessor run fast enough to simulate decently a mapper. (however, that mapper would hardly be able to, say, handle CHR bankswitching on the fly for banks smaller than 8k, because this would be a really hard thing to do)
The reason mappers are fast is that they are built from basic logic gates, like latches. They have no clock so they run as fast as the logic itself runs.
blargg wrote:They have no clock so they run as fast as the logic itself runs.
Actually, their bankswitching value is latched just when the clock (M2) line goes low after a write to the mapper, so they definitely have a clock, but the mapper reacts instantly after mapper writes.
