DMC channel

[strangenesfreak]

Registers A, X, and Y are internal to the CPU, and mappers can't see them until the CPU puts them on the data bus with the PHA, STA, STX, or STY instruction. The only way I can see that a mapper can "save" register A is by providing a single byte of RAM where the CPU can STA and LDA, and that would appear more complicated than just requiring the CPU to PHA/PLA.

Tracking PC also has a problem: how would the mapper distinguish between instruction and data fetches, or between 1-byte and 2-byte instructions, without including the 6502's entire instruction decoder?

True. For saving the A register, I was thinking of the mapper watching LDA and other instructions that modify A, but that would cause bus conflicts in certain cases. I was indeed thinking of the mapper carrying an instruction encoder, which I guess could be just as or more complicated than the sound synthesis. Still, theoretically, it would be very nice if the mapper could help optimize code in PRG-ROM as much as possible.

[Bregalad]

Nothing that crazy would be needed !! It doesn't really make sense.

And I was talking about raw PCM mixing. DPCM just produce horrible sound ! I don't see how you could play anything meaningfull with it with real time mixing.

The ideal would have some mapper that would have an intergreated CPU, and some RAM that are dual ported to the internal CPU and the 6502. This RAM can handle $2006/$2007 updates for VBlank, can can hold the joypad data. Also, the sound code would set some varaibles in this piece of RAM to tell the NES CPU what to write to it's APU registers. On the other side, the NES CPU would also set some flags when it synchronizes with the PPU.
Celuis, it's effectively 2 programms runnign at the same time, but they do NOT acess to the same external ports, exept for a small area of dual-ported RAM. For example $5c00-$5fff could be dual ported RAM like on the MMC5.

The programm inside the NES (after the init) would be very small (probably 8kb) and could look like something like that :

Code: Select all

RESET
    sei
    ........ ;Some initilaisiation code
    cli
-    jmp -

NMI
   bit $2002
   lda #$00
   sta $5xxx   ;The mapper knowns we're in NMI
   lda #$5c
   sta $4014       ;SpriteDMA from external memory for simplicity
   jsr Update20062007  ;Read some buffer from $5d00-$5fff
   lda ScrollH
   sta $2005
   lda ScrollV    ;Those variables reside somewhere at $5d00-$5fff
   sta $2005
   lda Nametable
   sta $2000
   lda #$01
   sta $5xxx  ;The mapper knowns we're at the end of the NMI

   lda $5xxxx  ;Update the PSG sound registers (could be done
   sta $4000   ;a more sofisticated way)
   lda $5xxx
   sta $4001
   etc....
   rti

IRQ              ;Interrupt every scanline ?
    ldx SoundIndex
    inc SoundIndex
    lda $5xxxx,X  ;256-byte ring buffer
    sta $4011     ;Write PCM data

    ldy RasterFlag,X   ;This system allows to write to any of $2000-$2007 regs
    beq +                ;During the frame
-    ldx RasterIndex,Y
    lda RasterData,Y
    sta $2000,X
    dey
    bne -
+  rti

[blargg]

And you don't even need dual-ported RAM, just interleaved access (as the SPC-700 does, where the CPU accesses it on the first cycle, and the DSP on the second and third).

[tepples]

So the game runs on a CPU inside the cart, and the NES just passes I/O through. Where have I heard that before?

But imagine that we don't want to go that far. How much of a synthesizer or sample mixer could fit onto a CPLD? Or would one need an FPGA + level shifters for that?