Does changing loopy_v during 'hblank time' affect MMC3 irqs?

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Dwedit
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Does changing loopy_v during 'hblank time' affect MMC3 irqs?

Post by Dwedit »

If you change loopy_v during screen render in the "hblank" portion of a scanline, does it put that value on the PPU bus and thus affect MMC3 irqs?
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Post by Dwedit »

Bump?
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Post by dvdmth »

Changes to the VRAM address/scroll regs during rendering will not affect the MMC3. The CHR A12 line is what controls IRQ timing, and when rendering is active that line functions completely independently of the scroll regs.

Accrssing $2007, however, will cause bus conflicts on the CHR lines, which may cause the MMC3 to receive a clock, at least in theory (I don't think it's been tested).
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Post by Zepper »

WTF!?
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Dwedit
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Post by Dwedit »

Does moving the PPU address to the palette affect A12, or does the PPU have some way of hiding these from the cartridge?
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Dwedit
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Post by Dwedit »

Seriously now... moving PPU ADDRESS into the Palette area DOES change A12 to 1, right?
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Post by Zepper »

The very little I know - while the ppu is fetching tiles from 1000h, the A12 is up (bg or sprites). When the loopy_v has A12 toggled through 2006/7, yes, A12 is up.

...and I dislike getting "ignored". :(
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Disch
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Post by Disch »

iirc... one or more of blargg's MMC3 tests fail if you block $2006/$2007 triggered A12 changes during rendering (I've tried this before). So based on that I would say that yes... changing the PPU address during rendering (hblank) does impact A12 and thus the IRQ counter.

However I wouldn't use that as a final word. Perhaps this could be a subject for more in depth testing (as well as how far apart A12 rises have to be for the MMC3 IRQ to clock?)
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