Rad Racer 2 [MMC3]

Zepper · Post by **Zepper** » Mon Jan 25, 2010 9:44 am

- What's required to get this game working on MMC3? Does it use a different revision than SMB3 or MegaMan3 as examples?

James · Post by **James** » Mon Jan 25, 2010 11:14 am

Rad Racer 2 uses four-screen mirroring. Some of the roms floating around don't have this correctly marked in the header, so check for that first. Since the cart is hard wired in four-screen mode, writes to the MMC3 mirroring register should be ignored.

Zepper · Post by **Zepper** » Mon Jan 25, 2010 11:30 am

- Great, thank you. ^_^;;

- Next, see something wrong?

- The right side is glitched, part of the road appears. Any ideas?

Dwedit · Post by **Dwedit** » Mon Jan 25, 2010 11:42 am

FCEUX also has it screwed up:

Nestopia and Nintendulator have no problem though.

Zepper · Post by **Zepper** » Mon Jan 25, 2010 12:17 pm

- I wonder if this game uses a different MMC board revision, implying a different IRQ setup (A or B).

James · Post by **James** » Mon Jan 25, 2010 12:26 pm

It uses the TVROM board: http://wiki.nesdev.com/w/index.php/TVROM

I don't think it relies on any 'special' behavior. My MMC3 code is pretty dumb (no accounting for different IRQ setups, doesn't deal with manually clocking A12, etc), and I don't see these glitches.

Zepper · Post by **Zepper** » Mon Jan 25, 2010 4:33 pm

- I have no clue (yet). Just double checking: the nametables are update through writes to $2000-$3EFF, right? Here's my write code:

Code: Select all

_ppubank_name_write((tempaddr>>10)&3,tempaddr&0x3FF,data);
(bank 0..3, address 0..3FF, value)

James · Post by **James** » Mon Jan 25, 2010 8:25 pm

looks ok to me.

Zepper · Post by **Zepper** » Mon Jan 25, 2010 10:49 pm

- If I pull back the PPU x scroll update to a lower value (<257), it fixes partially; less then 245 causes the IRQ to malfunction. Of course, this was just an hack to look for the problem.

James · Post by **James** » Tue Jan 26, 2010 10:39 am

I don't know... I guess I still suspect cpu timing (as mentioned in the Battletoads thread) or perhaps even a cpu bug. The reason I say this is because I tested Rad Racer (1, not 2) w/ RockNES and saw glitches similar to ones I saw in my emulator when I had some cpu timings wrong.

I tried recreating the Rad Racer 2 issue by 'breaking' some of my cpu code, but didn't have any luck.

Zepper · Post by **Zepper** » Tue Jan 26, 2010 11:12 am

James wrote:I don't know... I guess I still suspect cpu timing (as mentioned in the Battletoads thread) or perhaps even a cpu bug. The reason I say this is because I tested Rad Racer (1, not 2) w/ RockNES and saw glitches similar to ones I saw in my emulator when I had some cpu timings wrong.

I tried recreating the Rad Racer 2 issue by 'breaking' some of my cpu code, but didn't have any luck.

- Forget the last public version, it's broken. Heh, the last public version of your emu doesn't recognize the 4-screen mirroring as it seems.

- Here my latest RockNES binary anyway. If you want to look the source code, just let me know.

James · Post by **James** » Tue Jan 26, 2010 12:18 pm

Zepper wrote:Heh, the last public version of your emu doesn't recognize the 4-screen mirroring as it seems.

Yeah, I just fixed it a couple of weeks ago (which is why I could respond so quickly

). I have some other changes that need to be wrapped up before I release a new version.

Zepper wrote:If you want to look the source code, just let me know.

I'd be happy to take a look at it, if you want me to. I sent you a PM with my email address -- we can discuss off-line.

Dwedit · Post by **Dwedit** » Tue Jan 26, 2010 12:46 pm

Usually, whenever I get a situation like this, I use Nintendulator Debug and put breakpoints at PPU writes, to see if the timing is correct and matches what the other emulator does.

Zepper · Post by **Zepper** » Tue Jan 26, 2010 8:27 pm

- It seems the same problem with this demo by Bregalad. Uh, could someone test it with PowerPak?

- Of course, this glitch isn't "static". It disappears from left to right, then restarts. Just try it in my latest binary to see what I mean.

Dwedit · Post by **Dwedit** » Tue Jan 26, 2010 11:03 pm

Which PPU pixel does the bankswitch/pattern table change instruction end on?