Refining design for really low-cost devcart

[marshallh]

The idea is interesting, but I think that $40 is a bit too much for a cart that can only run NROM and MMC1 games.

$40 is a fucking deal.



heres my proposal:
http://search.digikey.com/scripts/DkSea ... -80I/PT-ND

256KB flash , 64KB sram. 12KB boot flash memory so all 256kb can be used for NES purposes.

TQFP100 package. Anybody who has a $15 radioshack iron, flux, and solder wick can solder it.

Usb 2.0, possibility for SD card support, all sorts of crazy stuff. Yes, this would require a batch of PCBs to be made.

This chip is $9.50. The parts costs will be close to $40 for everything but you will have a lot more at your disposal.

I'm no expert on MMC1 but that PIC supports hardware DMA and can be clocked pretty fast, if it comes to it.

[blargg]

Sure, a custom design would be best, but I'm more interested in something that will actually happen, hence the incremental approach. If we get this minimal-modifications-to-existing-board working, then someone can do something like you propose, with more confidence of success and the ability to build on our software etc.

[blargg]

First Flash test allowed successful booting off Flash and write of a byte to it. Didn't even need any of the MMC1 CHR bank outputs, aside from one for A17 of the flash since it was larger than 256KB. Next test, putting a NES program into it.

[Memblers]

Heh, I missed the PIC32 mention.

TQFP100 package. Anybody who has a $15 radioshack iron, flux, and solder wick can solder it.

Anybody can, but not many will. I don't think this part would work as well in a build-it-yourself kit. This part is extremely small and I think 0.4mm pitch, it's nothing like the TQFP packaging on the MMC3.

I'm actually designing the PIC32 into my rev3 Squeedo (the old one designed 5 years ago used PIC18). I think the NES could run sequential code directly off if it, but I don't see how that could work for random accesses like the NMI/reset vectors, branches, jumps and stuff like that. So you still pretty much need a normal memory chip. The rev3 Squeedo will have some extra stuff in there to tie it all together, so my design isn't really made to be inexpensive. It definitely will be cheaper than the PowerPak though (and far more capable for development).

[blargg]

Flash works perfectly (if you don't leave one of the address pins floating, that is!). To handle writing, Flash /CS goes to /CART (50 on edge connector), and /OE goes to ROM /CS from the MMC1, and of course /WE goes to /WR on the bus. This was a 512K Flash, so A18 was wired to a CHR bank output of the MMC1. Sweet Home and Zelda both ran successfully on this.

Writing to Flash worked fine, as predicted. I selected the 16K bank at $8000 via the MMC1 PRG register, then wrote to the Flash there, repeated for each 16K bank. Programming the flash involves alternating writes with the high bit set and clear, so the MMC1 shift register gets reset and thus no registers get modified. Resetting the shift register sets bits 2 and 3 of the $8000 MMC1 register, but that's the mode I have it in, so no problem.

The next step is to add the ability to disable the MMC1, and make CHR RAM read-only. This involves a resistor+diode pair each. That's being wired as I write this...